Abstract: A method of forming a semiconductor device according to the present disclosure includes forming a metal-insulator-metal (MIM) structure in a substrate and forming an interconnect structure over the substrate. The MIM structure includes first electrodes of a first polarity and second electrodes of a second polarity. The interconnect structure includes conductive paths electrically connecting to the first and second electrodes. The conductive paths are isolated from each other inside the interconnect structure. The method also includes forming first and second contact pads over the interconnect structure. The first contact pad electrically connects a first portion of the conductive paths corresponding to the first electrodes. The second contact pad electrically connects a second portion of the conductive paths corresponding to the second electrodes.

Abstract: A structure and method for improving manufacturing yield of passive device dies are disclosed. The structure includes first and second groups of capacitors disposed on a substrate, an interconnect structure disposed on the first and second groups of capacitors, first and second bonding structures disposed on the first and second conductive lines, respectively, and first and second measurement structures connected to the first and second conductive lines, respectively, and configured to measure electrical properties of the first and second groups of capacitors, respectively. The interconnect structure includes first and second conductive line connected to the first and second groups of trench capacitors, respectively. The first bonding structure is electrically connected to the first group of capacitors and the second bonding structure is electrically isolated from the first and second groups of capacitors. The first and second measurement structures are electrically isolated from each other.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. In one aspect, at least one active deep trench capacitor (DTC), the at least one active DTC including a plurality of conductive layers and an insulating layer disposed between adjacent conductive layers of the plurality of conductive layers. The semiconductor device includes a plurality of dummy DTCs disposed on opposing sides of the at least one active DTC, the plurality of dummy DTCs and the at least one active DTC arranged in a row. The semiconductor device includes a plurality of conductive structures connected to the plurality of conductive layers of the active DTC, the plurality of dummy DTCs insulated from the at least one active DTC.

Abstract: A semiconductor device includes: a first conductive structure that comprises a first portion having sidewalls and a bottom surface, wherein the first conductive structure is embedded in a first dielectric layer; and an isolation layer comprising a first portion and a second portion, wherein the first portion of the isolation layer lines the sidewalls of the first portion of the first conductive structure, and the second portion of the isolation layer lines at least a portion of the bottom surface of the first portion of the first conductive structure.

Abstract: A semiconductor device includes: a first conductive structure that comprises a first portion having sidewalls and a bottom surface, wherein the first conductive structure is embedded in a first dielectric layer; and an isolation layer comprising a first portion and a second portion, wherein the first portion of the isolation layer lines the sidewalls of the first portion of the first conductive structure, and the second portion of the isolation layer lines at least a portion of the bottom surface of the first portion of the first conductive structure.