Abstract: A heating structure includes a substrate, a heating layer, a heat conducting layer, and a heat sensing layer. The heating layer includes at least one heating area. The heat conducting layer corresponds to the heating area. The heat sensing layer is disposed on the at least one heating area and electrically connected to the heating layer. The heating layer is used to heat the heat conducting layer. The heat sensing layer is used to sense a temperature of the heating area. A detection chip with the heating structure, and a nucleic acid detection device with the nucleic acid detection chip are also disclosed. The heating structure can make the heating temperature of the heating area more uniform and stable. The heating area of the heating structure has a lower heat loss and a higher heating efficiency.

Abstract: A device for fastening a first assembly into a second assembly by applying high-speed vibration includes a location detection unit and an adsorption unit. The location detection unit records locations of the first assembly and the second assembly. The adsorption unit adsorbs the first assembly and adjusts the first assembly by vibration according to the locations of the first assembly and the second assembly to achieve a fastening of the first assembly into the second assembly.

Abstract: A printed circuit board includes a differential pair of transmission lines. The differential pair of transmission lines includes a first signal transmission line and a second signal transmission line. The first signal transmission line includes a first via and a second via. The second transmission line includes a third via and a fourth via. A first distance between a center of the first via and a center of the third via is equal to a first value. A second distance between a center of the second via and a center of the fourth via is equal to the first value. A third distance between the center of the first via and the center of the second via is equal to a second value. A fourth distance between the center of the third via and the center of the fourth via is not equal to the second value.

Abstract: A printed circuit board includes a differential pair of transmission lines. The differential pair of transmission lines includes a first signal transmission line and a second signal transmission line. The first signal transmission line includes a first via and a second via. The second transmission line includes a third via and a fourth via. A first distance between a center of the first via and a center of the third via is equal to a first value. A second distance between a center of the second via and a center of the fourth via is equal to the first value. A third distance between the center of the first via and the center of the second via is equal to a second value. A fourth distance between the center of the third via and the center of the fourth via is not equal to the second value.

Abstract: An electronic device includes a wireless module, a power supply, and a switch module. The wireless module is adapted to receive or send a wireless signal. The power supply is adapted to supply power for the wireless module. The switch module is connected between the wireless module and the power supply, and the switch module includes a first switch and a transistor. A collector terminal of the transistor is coupled to the power supply, the first switch is coupled to the collector terminal and the base terminal of the transistor, and an emitter terminal of the transistor is coupled to the wireless module. The transistor is switched on when the first switch is switched on, and the power supply supplies power for the wireless module. The transistor is switched off when the first switch is switched off, and the power supply is disconnected from the wireless module.

Abstract: An electronic device includes a wireless module, a power supply, and a switch module. The wireless module is adapted to receive or send a wireless signal. The power supply is adapted to supply power for the wireless module. The switch module is connected between the wireless module and the power supply, and the switch module includes a first switch and a transistor. A collector terminal of the transistor is coupled to the power supply, the first switch is coupled to the collector terminal and the base terminal of the transistor, and an emitter terminal of the transistor is coupled to the wireless module. The transistor is switched on when the first switch is switched on, and the power supply supplies power for the wireless module. The transistor is switched off when the first switch is switched off, and the power supply is disconnected from the wireless module.

Abstract: A printed circuit board includes an outer signal layer, a first ground layer, a first ground layer located below the outer signal layer, an inner signal layer located below the first ground layer, an second ground layer located below the inner signal layer, and a first differential signal transmission pair and a second differential signal transmission pair laid on the outer signal layer and the inner signal layer. A value h is equal to a distance between the inner signal layer and its closest ground layer. A distance between the first pair and the second pair is not more than h×3.

Abstract: A pair of signal transmission lines includes an aggressor line, a victim line, a first test pad, and a second test pad. The first test pad is in the aggressor line. The victim line is parallel to the aggressor line. A second test pad is in the victim line. The first test pad, on the aggressor line, is misaligned with the second test pad, on the victim line, to reduce the incidence and amplitude of any crosstalk generated.

Abstract: A testing system for testing a layout of a power pin of a chipset on a circuit board includes a layout information obtaining module, a power pin sorting module, a transmission line sorting module, a transmission line length calculating module, and a report generating module. The layout information obtaining module obtains layout information of the printed circuit board. The power pin sorting module sorts the power pin from a number of pins of the chipset. The transmission line sorting module sorts transmission lines that are connected to the power pin and are located on outer layers of the printed circuit board. The transmission line length calculating module calculates a total length of the transmission lines sorted by the transmission line sorting module and compares the total length with a threshold length. The report generating module generates a testing report indicating whether or not the power pin is qualified.

Abstract: A testing system for testing a layout of a power pin of a chipset on a circuit board includes a layout information obtaining module, a power pin sorting module, a transmission line sorting module, a transmission line length calculating module, and a report generating module. The layout information obtaining module obtains layout information of the printed circuit board. The power pin sorting module sorts the power pin from a number of pins of the chipset. The transmission line sorting module sorts transmission lines that are connected to the power pin and are located on outer layers of the printed circuit board. The transmission line length calculating module calculates a total length of the transmission lines sorted by the transmission line sorting module and compares the total length with a threshold length. The report generating module generates a testing report indicating whether or not the power pin is qualified.

Abstract: A printed circuit board assembly comprises a PCB and a shielding structure. The PCB comprises a top surface, a bottom surface, a first side surface, a second side surface, a third side surface, and a fourth side surface. A signal transmission line is laid in the top surface. The shielding structure is attached to the PCB and securely contacts the first side surface, the second side surface, the third side surface, and the fourth side surface. Edges of the top surface and the bottom surface are configured to shield EMI in the signal transmission line when transmitting high-speed differential signals.

Abstract: A printed circuit board includes a board body, a signal transmission line laid in the board body, and a metal bracket attached to the board body. The metal bracket tightly abuts side surfaces of the board body and shields electromagnetic interference of the signal transmission line when the signal transmission line transmits high-speed differential signals.

Abstract: An system for testing direct current (DC) layout of a printed circuit board, the system includes a layout information obtaining module, a rule loading module, a test script building module, a script executing module, and a report generating module. The layout information obtaining module obtains layout information of the printed circuit board. The rule loading module load DC transmission rules. The test script building module builds a DC transmission test scrip of the printed circuit board according to one of the DC transmission rules. The script executing module executes the DC transmission test script to determine whether the layout information of the printed circuit board complies with the one of the DC transmission rules. The report generating module generates a DC transmission testing report depicting whether the layout information of the printed circuit board complies with the one of the DC transmission rules and displays the testing report.

Abstract: A circuit board includes at least four signal lines. The at least four signal lines are substantially parallel to each other and includes two first adjacent signal lines and two second adjacent signal lines adjacent to the first adjacent signal lines. A polarity of signals transmitted by the two first adjacent signal lines is opposite to a polarity of signals transmitted by two second adjacent signal lines.

Abstract: A printed circuit board includes a signal layer having a pair of differential transmission lines thereon. An eye width and an eye height of an eye diagram obtained at output terminals of the pair of differential transmission lines are variable according to a distance between the pair of differential transmission lines. The eye width and the eye height of the eye diagram are at minimum values when the distance between the pair of differential transmission lines is at a first distance. The eye width and the eye height meet requirements of the pair of differential transmission lines for the eye diagram when the distance between the pair of differential transmission lines is set at a second distance, the second distance is less than the first distance.

Abstract: A printed circuit board layout method includes the following steps. A printed circuit board with a signal layer and a pair of differential transmission lines positioned on the signal layer is provided. A first distance is determined; when the distance between the pair of differential transmission lines is greater than the first distance, an eye width and an eye height of an eye diagram nearly remains the same. When a distance between the pair of differential transmission lines is less than the first distance, an eye width and an eye height of an eye diagram decreases. A second distance that is less than the first distance is set between the pair of differential transmission lines which makes the eye width and the eye height greater than a predetermined value, and which is determined by a Far End Crosstalk (FEXT) on the eye diagram when the pair differential transmission lines transmit signals.

Abstract: A printed circuit board layout method includes the following steps. A printed circuit board with a signal layer, and a pair of differential transmission lines positioned on the signal layer is provided. A first distance is determined, when the distance between the pair of differential transmission lines is greater or less than the first distance, an eye width and an eye height of an eye diagram obtained at output terminals of the pair of differential transmission lines increases. A second distance less than the first distance is set between the pair of differential transmission lines which makes the eye width and the eye height meet requirement of the differential transmission lines for the eye diagram.

Abstract: A circuit board includes a signal plane and a ground plane. The signal plane is configured to have a plurality of signal traces. Each of the signal traces includes a plurality of straight line segments. Each line segment extends along a path different from the others. The ground plane includes a plurality of tiles connected in an array. Each tile is formed by ground traces. The straight line segments of each signal trace mapped on the ground plane are arranged at an angle relative to any one ground trace of the tiles. The angle is defined within a range determined by one of ground traces of a tile and an adjacent diagonal line of the tile. A method for laying out such a circuit board is also provided.

Abstract: An electronic device enclosure for suppressing Electro-Magnetic Interference (EMI) includes a first plate defined on a first plane, a second plate defined on a second plane and a number of polygonal holes defined in the first plate at an angle of orientation. The second plane is substantially perpendicular to the first plane. The angle of orientation of the number of polygonal holes in the first plate is set according to a number of maximum dimensions in a direction substantially perpendicular to the second plane. The angle of orientation is defined such that there are a minimum number of maximum dimensions.

Abstract: A method for laying out a circuit board includes following steps. A substrate board is formed with a plurality of board sides. A ground plane, including a plurality of tiles, is provided. Each ground trace tile is defined by a plurality of ground traces. A signal plane on the substrate board has a plurality of signal traces that comprise of a plurality of straight line segments. Any one ground trace of each tile is arranged at an angle other than zero degrees relative to one determined board side. The straight line segments is applied to be mapped on the ground plane crossing one ground trace of one tile within an angle range determined by the ground traces of the tile and an adjacent diagonal line of the tile. The one ground trace and the straight line segments are applied at an angle movable in a range from 22.5° to 32.5°.