Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.

Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.

Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: A system and method for estimating free space and assigning free space probabilities in point cloud data associated with an autonomous vehicle traveling on a surface, including taking into account sensor noise, sensor availability, obstacle heights, and distance of obstacles from the sensor. System and method can include determining surface planes and classifying point cloud points according to whether or not the points fall on surface planes, among other factors.

Abstract: A system and method for estimating free space and assigning free space probabilities in point cloud data associated with an autonomous vehicle traveling on a surface, including taking into account sensor noise, sensor availability, obstacle heights, and distance of obstacles from the sensor. System and method can include determining surface planes and classifying point cloud points according to whether or not the points fall on surface planes, among other factors.

Abstract: A diode structure and a manufacturing method are disclosed. The diode structure includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and an epitaxy layer. The semiconductor substrate includes a first surface. The first semiconductor layer and the second semiconductor layer are extended toward the interior of the semiconductor substrate from the first surface by implanting a dopant. Both of the semiconductor types of the first semiconductor layer and the second semiconductor layer are opposite to the semiconductor type of the semiconductor substrate. The epitaxy layer is formed on the first surface, connected with the first semiconductor layer and the second semiconductor layer and extended outwardly from the first surface. The first semiconductor layer and the second semiconductor layer are connected with each other, continuously.

Abstract: A method for designing a photomask includes calculating an open ratio of an initial photomask to determine whether the open ratio of the initial photomask is less than 25%, and then changing a design of the initial photomask in response to determining the open ratio is less than 25%, such that a changed photomask has a reverse tone to the design of the initial photomask, and an open ratio of the changed photomask is 75% or more. The method can solve the issue caused by thermal expansion of the photomask.

Abstract: A diode structure and a manufacturing method are disclosed. The diode structure includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and an epitaxy layer. The semiconductor substrate includes a first surface. The first semiconductor layer and the second semiconductor layer are extended toward the interior of the semiconductor substrate from the first surface by implanting a dopant. Both of the semiconductor types of the first semiconductor layer and the second semiconductor layer are opposite to the semiconductor type of the semiconductor substrate. The epitaxy layer is formed on the first surface, connected with the first semiconductor layer and the second semiconductor layer and extended outwardly from the first surface. The first semiconductor layer and the second semiconductor layer are connected with each other, continuously.

Abstract: A transient-voltage-suppression diode structure and a manufacturing method thereof are disclosed. The structure includes a substrate, an N? type epitaxial layer, a first metal layer, a first N+ type implant layer, a deep N+ type implant layer and plural polycrystalline plugs. The N? type epitaxial layer is disposed on the substrate. The first metal layer is disposed on the N? type epitaxial layer to form a working-voltage terminal. The first N+ type implant layer spatially corresponding to the working-voltage terminal and embedded in the N? type epitaxial layer is connected with the working-voltage terminal. The deep N+ type implant layer spatially corresponding to the working-voltage terminal and embedded in the N? type epitaxial layer is spaced apart from the first N+ type implant layer at a separation distance. The plural polycrystalline plugs are connected between the working-voltage terminal of the first metal layer and the deep N+ type implant layer.

Abstract: A transient-voltage-suppression diode structure and a manufacturing method thereof are disclosed. The structure includes a substrate, an N? type epitaxial layer, a first metal layer, a first N+ type implant layer, a deep N+ type implant layer and plural polycrystalline plugs. The N? type epitaxial layer is disposed on the substrate. The first metal layer is disposed on the N? type epitaxial layer to form a working-voltage terminal. The first N+ type implant layer spatially corresponding to the working-voltage terminal and embedded in the N? type epitaxial layer is connected with the working-voltage terminal. The deep N+ type implant layer spatially corresponding to the working-voltage terminal and embedded in the N? type epitaxial layer is spaced apart from the first N+ type implant layer at a separation distance. The plural polycrystalline plugs are connected between the working-voltage terminal of the first metal layer and the deep N+ type implant layer.

Abstract: A system and method for estimating free space and assigning free space probabilities in point cloud data associated with an autonomous vehicle traveling on a surface, including taking into account sensor noise, sensor availability, obstacle heights, and distance of obstacles from the sensor. System and method can include determining surface planes and classifying point cloud points according to whether or not the points fall on surface planes, among other factors.

Abstract: A method for designing a photomask includes calculating an open ratio of an initial photomask to determine whether the open ratio of the initial photomask is less than 25%, and then changing a design of the initial photomask in response to determining the open ratio is less than 25%, such that a changed photomask has a reverse tone to the design of the initial photomask, and an open ratio of the changed photomask is 75% or more. The method can solve the issue caused by thermal expansion of the photomask.

Abstract: The present invention discloses a dual-targeting drug carrier and a method for fabricating the same, wherein WGA- and FA-modified MPEG-PLA nanoparticles of the carrier enable the anticancer drugs encapsulated thereinside to pass through BBB and target human glioblastoma cells. The dual-target drug carrier is fabricated in an emulsion-solvent evaporation technology and verified with an in-vitro BBB model formed of HBMECs, HAs and HBVPs. The present invention can increase the permeability of the in-vitro BBB model to the dual-target drug carrier and promote the glioblastoma-inhibition effect. Therefore, the present invention would contribute to the clinical therapy of brain cancers substantially in the future.