Abstract: The present disclosure describes a semiconductor device having fin structures with optimized fin pitches for substantially uniform S/D structures. The semiconductor device includes multiple fin structures on a substrate. The multiple fin structures have a first pitch and a second pitch in an alternate configuration and the second pitch is different from the first pitch. The semiconductor device further includes a gate structure on the multiple fin structures and a source/drain (S/D) structure adjacent to the gate structure and in contact with the multiple fin structures.

Abstract: A neural network circuit includes an input neuron layer comprises a plurality of first neurons. A hidden neuron layer includes a plurality of second neurons, wherein each of the second neurons comprises a probabilistic bit having a time-varying resistance. The probabilistic bit is a magnetic tunnel junction structure comprises a pinned layer, a free layer, and a tunneling barrier layer between the pinned layer and the free layer. A weight matrix comprising a plurality of synapse units, each of the synapse units connecting one of the plurality of first neurons to a corresponding one of the plurality of first neurons.

Abstract: An electronic device includes at least two image capturing units which face the same side. The at least two image capturing units include a first image capturing unit and a second image capturing unit. The first image capturing unit includes an optical image system and a first image sensor. The optical image system includes a first lens element and an image surface. The first image sensor is disposed on the image surface of the optical image system thereof and has a first resolution of at least 60 megapixels. The second image capturing unit includes an optical image system and a second image sensor. The optical image system includes a first lens element and an image surface. The second image sensor is disposed on the image surface of the optical image system thereof and has a second resolution of at least 40 megapixels.

Abstract: Methods, systems, and apparatuses are provided for uplink transmission to transmission and reception point with reduced functionality in a wireless communication system, wherein a method comprises receiving a Physical Downlink Control Channel (PDCCH) order from a first Transmission/Reception Point (TRP) of a serving cell, wherein a field in the PDCCH order indicates an association between a Physical Random Access Channel (PRACH) transmission and the first TRP with Downlink (DL) and Uplink (UL) functionality or an association between the PRACH transmission and a second TRP, of the serving cell, without DL functionality or with reduced DL functionality, and performing the PRACH transmission in response to the PDCCH order, wherein a transmit power of the PRACH transmission is determined based on the field.

Abstract: An imaging lens assembly includes three lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element and a third lens element. Each of the three lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The object-side surface of the second lens element is concave in a paraxial region thereof. At least one surface of at least one lens element in the imaging lens assembly has at least one inflection point.

Abstract: A hydrocarbon resin polymer including a repeating unit (A) is derived from dicyclopentadiene (DCPD). The hydrocarbon resin polymer has a fluorine substituent, and the content of the fluorine substituent is 100 to 4500 ppm based on the total weight of the hydrocarbon resin polymer. A manufacturing method of the above hydrocarbon resin polymer. The manufacturing method includes polymerizing a mixture in the presence of a fluorine-containing compound, wherein the fluorine-containing compound is a boron trifluoride complex and the mixture includes a dicyclopentadiene. A substrate structure includes a resin layer, and a conductive layer disposed on the resin layer. The resin layer is formed from a resin composition including the above hydrocarbon resin polymer using a cross-linking process.

Abstract: Video encoding or decoding methods and apparatuses include receiving input data associated with a current block in a current picture, determining a preload region in a reference picture shared by two or more coding configurations of affine prediction or motion compensation or by two or more affine refinement iterations, loading reference samples in the preload region, generating predictors for the current block, and encoding or decoding the current block according to the predictors. The predictors associated with the affine refinement iterations or coding configurations are generated based on some of the reference samples in the preload region.

Abstract: A display panel includes a driving backplane, a light emitting component, a reflective structure and a bridging component. The driving backplane has a first pad and a second pad separated from each other. The light emitting component has a first electrode and a second electrode. The first electrode is electrically connected to the first pad of the driving backplane, and the first electrode is located between the second electrode and the first pad of the driving backplane. The reflective structure is disposed on the driving backplane and located at a periphery of the light emitting component. The bridging component is disposed on the light emitting component. One end of the bridging component is electrically connected to the second electrode. The bridging component passes across at least one portion of the reflective structure. The other end of the bridging component is electrically connected to the second pad of the driving backplane.

Abstract: An optical lens assembly includes five lens elements, the five lens elements are, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each of the five lens elements has an object-side surface towards the object side and an image-side surface towards the image side. The fourth lens element with positive refractive power has the object-side surface being convex in a paraxial region thereof. The fifth lens element with negative refractive power has the object-side surface being concave in a paraxial region thereof and the image-side surface being concave in a paraxial region thereof.

Abstract: Methods and apparatuses are provided for power headroom report regarding multiple TRPs in a wireless communication system. The systems and methods of the present invention address, expand, and improve how networks perform power control on multiple TRPs, how networks manage power control for uplink transmissions for different links, and how a UE derives one or more PH/PHR for different links.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.

Abstract: A method of forming a semiconductor package is provided. The method includes forming a micro lens recessed from the top surface of a substrate. A concave area is formed between the surface of the micro lens and the top surface of the substrate. The method includes depositing a first dielectric material that fills a portion of the concave area using a spin coating process. The method includes depositing a second dielectric material that fills the remainder of the concave area and covers the top surface of the substrate using a chemical vapor deposition process. The method includes planarizing the second dielectric material. The method includes forming a bonding layer on the planarized second dielectric material and over the top surface of the substrate. The method includes bonding a semiconductor wafer to the substrate via the bonding layer.

Abstract: A method of compiling a deep learning model includes reading metadata from a compiled result, the metadata indicating a structure of the deep learning model corresponding to a low-level IR, receiving shape information of an input tensor of the deep learning model, determining a shape of an output tensor of a first computation operation of the computation operations based on the shape information of the input tensor of the deep learning model and the structure of the deep learning model, tiling the output tensor of the first computation operation into one or more tiles according to the shape of the output tensor of the first computation operation and hardware limitations of a processor executing the deep learning model, and patching one or more copies of a templated hardware command into executable hardware commands.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a first nanostructure and a second nanostructure over a substrate, forming a first interfacial layer on the first nanostructure and a second interfacial layer on the second nanostructure, forming a first gate dielectric layer on the first interfacial layer and a second gate dielectric layer on the second interfacial layer, forming a patterned mask layer on the second gate dielectric layer while exposing the first gate dielectric layer, and driving nitrogen into the first interfacial layer, thereby forming a nitrogen-doped interfacial layer.

Abstract: An optical lens system includes six lens elements from an object side to an image side, the six lens elements are, in order from the object side to the image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. Each of the six lens elements has an object-side surface towards the object side and an image-side surface towards the image side. The image-side surface of the second lens element is concave in a paraxial region thereof. The third lens element has positive refractive power. The image-side surface of the fourth lens element is concave in a paraxial region thereof. The image-side surface of the sixth lens element includes at least one inflection point.

Abstract: In an embodiment, a device includes: a sensor die having a first surface and a second surface opposite the first surface, the sensor die having an input/output region and a first sensing region at the first surface; an encapsulant at least laterally encapsulating the sensor die; a conductive via extending through the encapsulant; and a front-side redistribution structure on the first surface of the sensor die, the front-side redistribution structure being connected to the conductive via and the sensor die, the front-side redistribution structure covering the input/output region of the sensor die, the front-side redistribution structure having a first opening exposing the first sensing region of the sensor die.

Abstract: A vertical-cavity surface-emitting laser includes a substrate. A first mirror is disposed on the substrate. An active layer is disposed on the first mirror. An oxide layer is disposed on the active layer. An aperture is disposed on the active layer. The aperture is surrounded by the oxide layer. A second mirror is disposed on the aperture and the oxide layer. A high-contrast grating is disposed on the second mirror. The high-contrast grating includes a first grating element and a second grating element, and the first grating element and the second grating element are spaced apart from each other with an air gap therebetween. A passivation layer is disposed on the high-contrast grating. A first thickness of the passivation layer on a top surface of the first grating element is greater than a second thickness of the passivation layer on a first sidewall of the first grating element.

Abstract: In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N+/N well structure, and/or a PMOS structure arranged next to a P+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.

Abstract: In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N+/N well structure, and/or a PMOS structure arranged next to a P+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.