Patents by Inventor Yu-Hsuan Huang
Yu-Hsuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12149049Abstract: A vertical-cavity surface-emitting laser includes a substrate. A first mirror is disposed on the substrate. An active layer is disposed on the first mirror. An oxide layer is disposed on the active layer. An aperture is disposed on the active layer. The aperture is surrounded by the oxide layer. A second mirror is disposed on the aperture and the oxide layer. A high-contrast grating is disposed on the second mirror. The high-contrast grating includes a first grating element and a second grating element, and the first grating element and the second grating element are spaced apart from each other with an air gap therebetween. A passivation layer is disposed on the high-contrast grating. A first thickness of the passivation layer on a top surface of the first grating element is greater than a second thickness of the passivation layer on a first sidewall of the first grating element.Type: GrantFiled: November 16, 2021Date of Patent: November 19, 2024Assignee: WIN SEMICONDUCTORS CORP.Inventors: Yu-Chun Chen, Yu-Hsuan Huang, Chia-Ta Chang
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Publication number: 20240361381Abstract: In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N+/N well structure, and/or a PMOS structure arranged next to a P+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.Type: ApplicationFiled: July 9, 2024Publication date: October 31, 2024Inventors: Yu-Hsuan Huang, Chien-Liang Chen, Pei-Hsuan Lee
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Patent number: 12061229Abstract: In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N+/N well structure, and/or a PMOS structure arranged next to a P+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.Type: GrantFiled: June 28, 2022Date of Patent: August 13, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Hsuan Huang, Chien-Liang Chen, Pei-Hsuan Lee
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Publication number: 20230417830Abstract: In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N+/N well structure, and/or a PMOS structure arranged next to a P+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.Type: ApplicationFiled: June 28, 2022Publication date: December 28, 2023Inventors: Yu-Hsuan Huang, Chien-Liang Chen, Pei-Hsuan Lee
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Publication number: 20220209502Abstract: A vertical-cavity surface-emitting laser includes a substrate. A first mirror is disposed on the substrate. An active layer is disposed on the first mirror. An oxide layer is disposed on the active layer. An aperture is disposed on the active layer. The aperture is surrounded by the oxide layer. A second mirror is disposed on the aperture and the oxide layer. A high-contrast grating is disposed on the second mirror. The high-contrast grating includes a first grating element and a second grating element, and the first grating element and the second grating element are spaced apart from each other with an air gap therebetween. A passivation layer is disposed on the high-contrast grating. A first thickness of the passivation layer on a top surface of the first grating element is greater than a second thickness of the passivation layer on a first sidewall of the first grating element.Type: ApplicationFiled: November 16, 2021Publication date: June 30, 2022Inventors: Yu-Chun CHEN, Yu-Hsuan HUANG, Chia-Ta CHANG
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Patent number: 11373550Abstract: Disclosed is an augmented reality training system, which includes a manipulation platform, an augmented reality stereo microscopic assembly, an instrument tracking module and a simulation generation module. The augmented reality stereo microscopic assembly is configured for camera-based capture of real stereo videos and for optical transmission of augmented reality images into the user's eyes. The instrument tracking module uses top and bottom digital cameras to track a marker on an upper portion of an instrument manipulated on a surgical phantom and to track a lower portion of the instrument. The simulation generation module can generate and display augmented reality images that merge the real stereo videos and virtual images for simulation of actions of the instrument in interaction with a training program executed in a processor of the simulation generation module.Type: GrantFiled: April 22, 2019Date of Patent: June 28, 2022Inventor: Yu-Hsuan Huang
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Publication number: 20220049012Abstract: The present invention relates to epitopes located in CAIX and anti-CAIX antibodies having binding activity with cancer cells. The present invention also relates to the composition and application of the CAIX epitopes and anti-CAIX antibodies in the diagnosis, prevention and/or treatment of cancers.Type: ApplicationFiled: May 6, 2019Publication date: February 17, 2022Inventors: Bor-Yu TSAI, Wei-Ting HSU, Yu Hsuan HUANG
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Patent number: 11121046Abstract: A method includes: coupling a first end of a first conductive trace to a free electron source; scanning exposed surfaces of the first and a second conductive traces with an electron beam, the first conductive trace and a second conductive trace being alternately arranged and spaced apart; obtaining an image of the first conductive trace and the second conductive trace while performing the scanning; and determining a routing characteristic of the first conductive trace and the second conductive trace based on the image.Type: GrantFiled: January 16, 2019Date of Patent: September 14, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Pei-Hsuan Lee, Yu-Hsuan Huang, Chia-Chia Kan
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Patent number: 11080532Abstract: A highlight processing method includes: obtaining a frame sequence that includes frames each having image contents associated with at least one object, wherein object pose estimation is performed upon each frame of the frame sequence to generate an object pose estimation result of each frame, and further includes determining at least one of a start point and an end point of a highlight interval, wherein comparison of object pose estimation results of different frames is involved in determination of at least one of the start point and the end point of the highlight interval.Type: GrantFiled: August 19, 2019Date of Patent: August 3, 2021Assignee: MEDIATEK INC.Inventors: Shih-Jung Chuang, Yan-Che Chuang, Chun-Nan Li, Yu-Hsuan Huang, Chih-Chung Chiang
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Patent number: 10890751Abstract: The systems and applications for generating the augmented reality (AR) images are disclosed. The system includes a processing module and a digital microscope module having a plurality of camera units, and the processing module tracks and parses the user's motions to generate the related control signals, the virtual objects composed to form the AR images according to the received instant images of the observed objects captured by the digital microscope module. Moreover, the processing module generates and outputs the AR images composing of the instant images and the user interface (UI), icons, objects, video and/or information related to the interactive applications while the display mode switch or the real-time tutorial and sharing is triggered.Type: GrantFiled: May 31, 2019Date of Patent: January 12, 2021Inventor: Yu-Hsuan Huang
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Patent number: 10879135Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.Type: GrantFiled: December 16, 2019Date of Patent: December 29, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Shang-Wei Fang, Jing-Sen Wang, Yuan-Yao Chang, Wei-Ray Lin, Ting-Hua Hsieh, Pei-Hsuan Lee, Yu-Hsuan Huang
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Publication number: 20200226386Abstract: A highlight processing method includes: obtaining a frame sequence that includes frames each having image contents associated with at least one object, wherein object pose estimation is performed upon each frame of the frame sequence to generate an object pose estimation result of each frame, and further includes determining at least one of a start point and an end point of a highlight interval, wherein comparison of object pose estimation results of different frames is involved in determination of at least one of the start point and the end point of the highlight interval.Type: ApplicationFiled: August 19, 2019Publication date: July 16, 2020Inventors: Shih-Jung Chuang, Yan-Che Chuang, Chun-Nan Li, Yu-Hsuan Huang, Chih-Chung Chiang
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Publication number: 20200118893Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: Shang-Wei FANG, Jing-Sen WANG, Yuan-Yao CHANG, Wei-Ray LIN, Ting-Hua HSIEH, Pei-Hsuan LEE, Yu-Hsuan HUANG
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Publication number: 20200043815Abstract: A method includes: coupling a first end of a first conductive trace to a free electron source; scanning exposed surfaces of the first and a second conductive traces with an electron beam, the first conductive trace and a second conductive trace being alternately arranged and spaced apart; obtaining an image of the first conductive trace and the second conductive trace while performing the scanning; and determining a routing characteristic of the first conductive trace and the second conductive trace based on the image.Type: ApplicationFiled: January 16, 2019Publication date: February 6, 2020Inventors: PEI-HSUAN LEE, YU-HSUAN HUANG, CHIA-CHIA KAN
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Patent number: 10510623Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.Type: GrantFiled: December 27, 2017Date of Patent: December 17, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shang-Wei Fang, Jing-Sen Wang, Yuan-Yao Chang, Wei-Ray Lin, Ting-Hua Hsieh, Pei-Hsuan Lee, Yu-Hsuan Huang
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Publication number: 20190325785Abstract: Disclosed is an augmented reality training system, which includes a manipulation platform, an augmented reality stereo microscopic assembly, an instrument tracking module and a simulation generation module. The augmented reality stereo microscopic assembly is configured for camera-based capture of real stereo videos and for optical transmission of augmented reality images into the user's eyes. The instrument tracking module uses top and bottom digital cameras to track a marker on an upper portion of an instrument manipulated on a surgical phantom and to track a lower portion of the instrument. The simulation generation module can generate and display augmented reality images that merge the real stereo videos and virtual images for simulation of actions of the instrument in interaction with a training program executed in a processor of the simulation generation module.Type: ApplicationFiled: April 22, 2019Publication date: October 24, 2019Inventor: Yu-Hsuan HUANG
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Publication number: 20190285867Abstract: The systems and applications for generating the augmented reality (AR) images are disclosed. The system includes a processing module and a digital microscope module having a plurality of camera units, and the processing module tracks and parses the user's motions to generate the related control signals, the virtual objects composed to form the AR images according to the received instant images of the observed objects captured by the digital microscope module. Moreover, the processing module generates and outputs the AR images composing of the instant images and the user interface (UI), icons, objects, video and/or information related to the interactive applications while the display mode switch or the real-time tutorial and sharing is triggered.Type: ApplicationFiled: May 31, 2019Publication date: September 19, 2019Inventor: Yu-Hsuan HUANG
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Publication number: 20190198403Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.Type: ApplicationFiled: December 27, 2017Publication date: June 27, 2019Inventors: Shang-Wei FANG, Jing-Sen WANG, Yuan-Yao CHANG, Wei-Ray LIN, Ting-Hua HSIEH, Pei-Hsuan LEE, Yu-Hsuan HUANG
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Publication number: 20180205932Abstract: The present invention provides a see-through augmented reality device coupled to a head-mounted display, the device comprises: a camera configured to capture an image; a 2-axis gimbal coupled to the camera and configured to stabilize the camera; a servo motor coupled to the camera and configured to control the rotations of the camera; a microcontroller coupled to the servo motor and configured to control the servo motor; a multiplexer coupled to the microcontroller and configured to decode signals received from the microcontroller; and an augmented reality image processor coupled to the camera and configured to combine a virtual object with the image captured by the camera to create a virtual-real image and transfer the virtual-real image to the head-mounted display.Type: ApplicationFiled: July 6, 2017Publication date: July 19, 2018Inventors: Tzu-Chieh Yu, Yu-Hsuan Huang, Te-Hao Chang, Ming Ouh Young
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Publication number: 20170227754Abstract: The systems and applications for generating the augmented reality (AR) images are disclosed. The system includes a processing module and a digital microscope module having a plurality of camera units, and the processing module tracks and parses the user's motions to generate the related control signals, the virtual objects composed to form the AR images according to the received instant images of the observed objects captured by the digital microscope module. Moreover, the processing module generates and outputs the AR images composing of the instant images and the user interface (UI), icons, objects, video and/or information related to the interactive applications while the display mode switch or the real-time tutorial and sharing is triggered.Type: ApplicationFiled: January 31, 2017Publication date: August 10, 2017Inventor: YU HSUAN HUANG