Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.

Abstract: According to the present disclosure, hybrid fins positioned between two different epitaxial source/drain features are recessed to prevent conductive material from entering interior air gaps of the hybrid fins, thus, preventing short circuit between source/drain contacts and gate electrodes. Recessing the hybrid fins may be achieved by enlarging mask during semiconductor fin etch back, therefore, without increasing production cost.

Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The n-type semiconductor layer is disposed on the sapphire substrate. The active layer has an active region with a defect density greater than or equal to 2×107/cm2. The active layer is disposed between the n-type and p-type semiconductor layers. The wavelength of light emitted by the active layer is ?, and 222 nm???405 nm. The active layer includes i quantum barrier layers and (i?1) quantum wells, each quantum well is disposed between any two quantum barrier layers, and i?2. N-type dopant is doped in at least k layers of the i quantum barrier layers, wherein k is a natural number and k?1, when i even, k?i/2, and when i is odd, k?(i?1)/2.

Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The n-type semiconductor layer is disposed on the sapphire substrate. The active layer has an active region with a defect density greater than or equal to 2×107/cm3. The active layer is disposed between the n-type and p-type semiconductor layers. The wavelength of light emitted by the active layer is ?, and 222 nm???405 nm. The active layer includes i quantum barrier layers and (i?1) quantum wells, each quantum well is disposed between any two quantum barrier layers, and i?2. N-type dopant is doped in at least k layers of the i quantum barrier layers, wherein k is a natural number and k?1, when i even, k?i/2, and when i is odd, k?(i?1)/2.

Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The active layer is located between the n-type and p-type semiconductor layers, and includes multiple quantum barrier layers and quantum wells located between any two quantum barrier layers. A lattice constant of the quantum barrier layer closest to the p-type semiconductor layer is a1. The interlayer is located between and in contact with the active layer and the p-type semiconductor layer, wherein a lattice constant of the interlayer is a2. The electron barrier layer is located between the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a3, and a2 is not equal to a1 or a3. The first and second electrodes are respectively located on the n-type and p-type semiconductor layers.