Patents by Inventor Yu-Hsuan Lu

Yu-Hsuan Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210272276
    Abstract: A benign tumor development trend assessment system includes an image outputting device and a server computing device. The image outputting device outputs first/second images captured from the same position in a benign tumor. The server computing device includes an image receiving module, an image pre-processing module, a target extracting module, a feature extracting module and a trend analyzing module. The image receiving module receives the first/second images. The image pre-processing module pre-processes the first/second images to obtain first/second local images. The target extracting module automatically detects and delineates tumor regions from the first/second local images to obtain first/second region of interest (ROI) images. The feature extracting module automatically identifies the first/second ROI images to obtain at least one first/second features. The trend analyzing module analyzes the first/second features to obtain a tumor development trend result.
    Type: Application
    Filed: July 27, 2020
    Publication date: September 2, 2021
    Inventors: Cheng-Chia Lee, Huai-Che Yang, Wen-Yuh Chung, Chih-Chun Wu, Wan-Yuo Guo, Wei-Kai Lee, Tzu-Hsuan Huang, Chun-Yi Lin, Chia-Feng Lu, Yu-Te Wu
  • Patent number: 9680051
    Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The n-type semiconductor layer is disposed on the sapphire substrate. The active layer has an active region with a defect density greater than or equal to 2×107/cm2. The active layer is disposed between the n-type and p-type semiconductor layers. The wavelength of light emitted by the active layer is ?, and 222 nm???405 nm. The active layer includes i quantum barrier layers and (i?1) quantum wells, each quantum well is disposed between any two quantum barrier layers, and i?2. N-type dopant is doped in at least k layers of the i quantum barrier layers, wherein k is a natural number and k?1, when i even, k?i/2, and when i is odd, k?(i?1)/2.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 13, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Keng Fu, Yu-Hsuan Lu
  • Publication number: 20140231747
    Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The n-type semiconductor layer is disposed on the sapphire substrate. The active layer has an active region with a defect density greater than or equal to 2×107/cm3. The active layer is disposed between the n-type and p-type semiconductor layers. The wavelength of light emitted by the active layer is ?, and 222 nm???405 nm. The active layer includes i quantum barrier layers and (i?1) quantum wells, each quantum well is disposed between any two quantum barrier layers, and i?2. N-type dopant is doped in at least k layers of the i quantum barrier layers, wherein k is a natural number and k?1, when i even, k?i/2, and when i is odd, k?(i?1)/2.
    Type: Application
    Filed: April 30, 2014
    Publication date: August 21, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Yi-Keng Fu, Yu-Hsuan Lu
  • Publication number: 20130228743
    Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, an interlayer, an electron barrier layer, a first and a second electrodes are provided. The active layer is located between the n-type and p-type semiconductor layers, and includes multiple quantum barrier layers and quantum wells located between any two quantum barrier layers. A lattice constant of the quantum barrier layer closest to the p-type semiconductor layer is a1. The interlayer is located between and in contact with the active layer and the p-type semiconductor layer, wherein a lattice constant of the interlayer is a2. The electron barrier layer is located between the interlayer and the p-type semiconductor layer, wherein a lattice constant of the electron barrier layer is a3, and a2 is not equal to a1 or a3. The first and second electrodes are respectively located on the n-type and p-type semiconductor layers.
    Type: Application
    Filed: December 27, 2012
    Publication date: September 5, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Keng Fu, Yu-Hsuan Lu