Abstract: A method of manufacturing a semiconductor structure, comprising: disposing a dielectric layer over a semiconductive wafer defined with a plurality of active regions and a scribe line region surrounding each of the plurality of active regions; forming a plurality of interconnect structures within the dielectric layer, wherein the formation of the plurality of interconnect structures includes forming a plurality of first testing pads within the scribe line region and at least partially exposed through the dielectric layer; and sawing the semiconductive wafer along the scribe line region to form a first interposer and a second interposer, wherein each of the plurality of first testing pads is at least partially removed by the sawing of the semiconductive wafer.

Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.

Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: A method of measuring hematocrit (HCT) and a measurement device using in the method and depends on an electrode test specimen to create a capacitor charging effect and consequential change in discharge current for measurement of hematocrit. The method of measuring hematocrit comprises steps as follows: (a) Instill blood into a pair of test electrodes which is installed in the present invention and apply a voltage to the pair of test electrodes; (b) Remove the voltage applied to the pair of test electrodes and measure a discharge current value; (c) Refer to a predetermined decision rule and the discharge current to obtain a hematocrit value for blood. As such, the present invention which relies on an electrode test specimen in measurement of hematocrit corresponding to a discharge current value during electric discharge contributes to precision and reliability in contrast to conventional hematocrit tests.

Abstract: A method for fast measurement of a specimen concentration which needs a sensing strip with an electrode test region on which an enzymatic reagent with a specific ingredient is coated and has steps as follows: place a specimen on the electrode test region of the sensing strip; apply a high voltage on the electrode test region for a period to create electrochemical current therein by which at least a faradic current and at least a non-faradic current are generated in the electrode test region; apply a measuring voltage less than the high voltage or the same as the high voltage on the electrode test region to generate a total current including faradic and non faradic currents and the total current finally reaching a steady current, which is measured for calculating a specimen concentration.

Abstract: A method of measuring hematocrit (HCT) and a measurement device using in the method and depends on an electrode test specimen to create a capacitor charging effect and consequential change in discharge current for measurement of hematocrit. The method of measuring hematocrit comprises steps as follows: (a) Instill blood into a pair of test electrodes which is installed in the present invention and apply a voltage to the pair of test electrodes; (b) Remove the voltage applied to the pair of test electrodes and measure a discharge current value; (c) Refer to a predetermined decision rule and the discharge current to obtain a hematocrit value for blood. As such, the present invention which relies on an electrode test specimen in measurement of hematocrit corresponding to a discharge current value during electric discharge contributes to precision and reliability in contrast to conventional hematocrit tests.