Patents by Inventor Yu-Hsuan Tsai
Yu-Hsuan Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250149347Abstract: A method for fabricating a semiconductor packaging structure is provided. The fabrication method includes providing a lower mold. The fabrication method includes disposing a plurality of semiconductor components on the lower mold. The fabrication method includes disposing a plurality of first metal structures on the lower mold, wherein the first metal structures are located on both sides of the semiconductor components. The fabrication method includes providing an upper mold to assemble with the lower mold to accommodate the semiconductor components and the first metal structures. The fabrication method includes filling a packaging material between the lower mold and the upper mold. The fabrication method includes removing the upper mold, the lower mold and the first metal structures to form a plurality of through holes in the packaging material located on both sides of the semiconductor components.Type: ApplicationFiled: April 19, 2024Publication date: May 8, 2025Inventors: Hsin-Chun CHIANG, Chang-Chin TSAI, Jung-Li CHEN, Yu-Hsuan TSAI
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Publication number: 20240429143Abstract: A power module structure is provided. The power module structure includes a substrate, a chip, a first metal structure, a second metal structure and a packaging material. The chip, the first metal structure and the second metal structure are disposed on the substrate. From a cross-sectional view, the width of the first metal structure is greater than the width of the second metal structure. The packaging material covers the substrate and the chip, and the portions of the first metal structure and the second metal structure are exposed from the upper surface of the packaging material.Type: ApplicationFiled: April 23, 2024Publication date: December 26, 2024Inventors: Jung-Li CHEN, Yu-Hsuan TSAI, Chang-Chin TSAI
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Patent number: 11565934Abstract: A semiconductor package structure includes a die paddle, a plurality of leads, an electronic component and a package body. Each of the plurality of leads is separated from the die paddle and has an inner side surface facing the die paddle. The electronic component is disposed on the die paddle. The package body covers the die paddle, the plurality of leads and the electronic component. The package body is in direct contact with a bottom surface of the die paddle and the inner side surface of the plurality of leads.Type: GrantFiled: January 3, 2020Date of Patent: January 31, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Hsuan Tsai, Lu-Ming Lai, Chien-Wei Fang, Ching-Han Huang
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Patent number: 11174157Abstract: A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.Type: GrantFiled: June 25, 2019Date of Patent: November 16, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Yu-Hsuan Tsai, Yin-Hao Chen, Hsin Lin Wu, San-Kuei Yu
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Patent number: 11101189Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: GrantFiled: May 27, 2020Date of Patent: August 24, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming Yen Lee, Chia-Hao Sung, Ching-Han Huang, Yu-Hsuan Tsai
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Patent number: 11081413Abstract: A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.Type: GrantFiled: February 21, 2019Date of Patent: August 3, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsin Lin Wu, Yu-Hsuan Tsai, Chang Chin Tsai, Lu-Ming Lai, Ching-Han Huang
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Publication number: 20210206628Abstract: A semiconductor package structure includes a die paddle, a plurality of leads, an electronic component and a package body. Each of the plurality of leads is separated from the die paddle and has an inner side surface facing the die paddle. The electronic component is disposed on the die paddle. The package body covers the die paddle, the plurality of leads and the electronic component. The package body is in direct contact with a bottom surface of the die paddle and the inner side surface of the plurality of leads.Type: ApplicationFiled: January 3, 2020Publication date: July 8, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Hsuan TSAI, Lu-Ming LAI, Chien-Wei FANG, Ching-Han HUANG
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Patent number: 10841679Abstract: A microelectromechanical systems package structure includes a first substrate, a transducer unit, a semiconductor chip and a second substrate. The first substrate defines a through hole. The transducer unit is electrically connected to the first substrate, and includes a base and a membrane. The membrane is located between the through hole and the base. The semiconductor chip is electrically connected to the first substrate and the transducer unit. The second substrate is attached to the first substrate and defines a cavity. The transducer unit and the chip are disposed in the cavity, and the second substrate is electrically connected to the transducer unit and the semiconductor chip through the first substrate.Type: GrantFiled: January 24, 2018Date of Patent: November 17, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Liang Hsiao, Yu-Hsuan Tsai, Pu Shan Huang, Ching-Han Huang, Lu-Ming Lai
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Patent number: 10804413Abstract: A package component includes a base layer, a sensing layer, a photo-curable adhesive, a cover layer and a first filter structure. The photo-curable adhesive and the sensing layer are disposed on the base layer. The sensing layer includes a sensing unit surrounded by the photo-curable adhesive. The cover layer is disposed on the sensing layer. The first filter structure faces the photo-curable adhesive and is disposed on the cover layer. The first filter structure is configured for transmitting a curing light which is used to cure the photo-curable adhesive, and for reflecting a detectable light which is to be sensed by the sensing unit, where the wavelength of the curing light is different from the wavelength of the detectable light.Type: GrantFiled: December 30, 2019Date of Patent: October 13, 2020Assignee: KINGPAK TECHNOLOGY INCInventor: Yu-Hsuan Tsai
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Publication number: 20200283288Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: ApplicationFiled: May 27, 2020Publication date: September 10, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming Yen LEE, Chia-Hao SUNG, Ching-Han HUANG, Yu-Hsuan TSAI
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Patent number: 10734337Abstract: A micro-electromechanical systems (MEMS) package structure includes: (1) a circuit layer; (2) a MEMS die with an active surface, wherein the active surface faces the circuit layer; (3) a conductive pillar adjacent to the MEMS die; and (4) a package body encapsulating the MEMS die and the conductive pillar, and exposing a top surface of the conductive pillar.Type: GrantFiled: March 5, 2019Date of Patent: August 4, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Kuang-Hsiung Chen, Yu-Hsuan Tsai, Yu-Ying Lee, Sheng-Ming Wang, Wun-Jheng Syu
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Patent number: 10720751Abstract: An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.Type: GrantFiled: August 30, 2018Date of Patent: July 21, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Hsuan Tsai, Lu-Ming Lai, Ying-Chung Chen, Shih-Chieh Tang
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Publication number: 20200206735Abstract: A detection method for enhancing detection signal intensity is provided. The detection method includes the following steps. Firstly, a detection device is provided. The detection device includes a channel, an inlet port and an air chamber. The air chamber includes an elastic layer. A bonding material is immobilized in the channel and served as a reaction area. Then, a sample containing a detection material is loaded into the inlet port. As the elastic layer is moved upwardly and downwardly, the sample is moved toward the air chamber and the inlet port in a reciprocating manner. Consequently, the possibility of combining the detection material of the sample with the bonding material in the reaction area is increased. Afterwards, an optical signal from the reaction area is measured.Type: ApplicationFiled: December 10, 2019Publication date: July 2, 2020Inventors: Chi-Han Chiou, Shu-Hsien Liao, Yu-Hsuan Tsai, Ching-Yu Chang
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Patent number: 10689248Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: GrantFiled: March 14, 2018Date of Patent: June 23, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming Yen Lee, Chia Hao Sung, Ching-Han Huang, Yu-Hsuan Tsai
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Publication number: 20200140262Abstract: A semiconductor device package includes a carrier; a sensor element disposed on or within the carrier; a cover disposed above the carrier and comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface; and a light transmissive element covering the penetrating hole, wherein the sensor element senses or detects light passing through the light transmissive element.Type: ApplicationFiled: January 6, 2020Publication date: May 7, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ching-Han HUANG, Hsun-Wei CHAN, Yu-Hsuan TSAI
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Patent number: 10526200Abstract: A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.Type: GrantFiled: November 16, 2017Date of Patent: January 7, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ching-Han Huang, Hsun-Wei Chan, Yu-Hsuan Tsai
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Publication number: 20200002162Abstract: A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.Type: ApplicationFiled: June 25, 2019Publication date: January 2, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Yu-Hsuan TSAI, Yin-Hao CHEN, Hsin Lin WU, San-Kuei YU
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Publication number: 20190267298Abstract: A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.Type: ApplicationFiled: February 21, 2019Publication date: August 29, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsin Lin WU, Yu-Hsuan TSAI, Chang Chin TSAI, Lu-Ming LAI, Ching-Han HUANG
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Publication number: 20190198469Abstract: A micro-electromechanical systems (MEMS) package structure includes: (1) a circuit layer; (2) a MEMS die with an active surface, wherein the active surface faces the circuit layer; (3) a conductive pillar adjacent to the MEMS die; and (4) a package body encapsulating the MEMS die and the conductive pillar, and exposing a top surface of the conductive pillar.Type: ApplicationFiled: March 5, 2019Publication date: June 27, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Kuang-Hsiung CHEN, Yu-Hsuan TSAI, Yu-Ying LEE, Sheng-Ming WANG, Wun-Jheng SYU
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Publication number: 20190097387Abstract: An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.Type: ApplicationFiled: August 30, 2018Publication date: March 28, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Hsuan TSAI, Lu-Ming LAI, Ying-Chung CHEN, Shih-Chieh TANG