Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to promote the development and growth of cotton seedlings. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and, at seedling stage and early growth stage, applied to the soil around the cotton plants, and sprayed to the young plants. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, before administering as taught herein.

Abstract: A package structure is provided. The package structure comprises a package substrate, an electronic device, a thermal interface material (TIM), a lid and an insulating encapsulant. The electronic device is disposed on and electrically connected to the package substrate. The TIM is disposed on the electronic device. The lid is disposed on the TIM. The insulating encapsulant is disposed on the package substrate and laterally encapsulates the electronic device and the TIM. A lateral dimension of the TIM is greater than a lateral dimension of the electronic device.

Abstract: The present disclosure relates to a processing tool that includes a first wafer-mounting frame and a second wafer-mounting frame. The first wafer-mounting frame is configured to retain a target wafer. The second wafer-mounting frame is configured to retain a masking wafer. The masking wafer includes a mask pattern made up of a number of openings passing through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first and second wafer-mounting frames, when the first and second wafer-mounting frames are clamped together to retain the target wafer and the masking wafer. The deposition chamber includes a material deposition source configured to deposit material from the material deposition source through the number of openings in the mask pattern to form the material in the predetermined deposition pattern on the target wafer.

Abstract: Techniques are provided for optimizing storage of database data records in segments using sub-segments. A segment may be comprised of a plurality of extents that contain data blocks and a plurality of references to sub-segments. Sub-segments are containers that contain other extents. A request to insert a set of records into a segment may be received by a database management system. Upon receiving the request, a particular sub-segment is selected to temporarily store the set of records. The set of records are inserted into data blocks belonging to an extent of the sub-segment. Access frequency for the set of records is monitored to determine whether the access frequency is less than a first threshold. When the access frequency of a subset of records is less than a first threshold, the subset of records is compressed and inserted into a particular extent of a particular segment.

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.

Abstract: The present invention relates to a kind of pigment preparation, in particular to a modified layered silicate novel barrier and shielding pigment and its preparation method. It is a layer silicate with exchangeable anticorrosive ions as a template, using metal oxides or metal salts, inorganic acids to synthesize nano-spherical zinc phosphate, phosphate, molybdate, borate or tungstate, with rare earth cerium, strontium, lanthanum or praseodymium doped modification of the pigment. The invention uses silicate as a template to effectively control the agglomeration of nanoparticles during the liquid phase deposition process, avoiding the multiple cleaning and sewage treatment processes required by using surfactants and solvents. What is more valuable is lamellar silicic acid. The salt itself has certain anti-corrosion properties and is economical.

Abstract: A semiconductor device includes a semiconductor substrate and a gate structure. The semiconductor substrate has source/drain regions and a channel region between the source/drain regions. The gate structure is over the channel region of the semiconductor substrate. The gate structure includes an interfacial layer, a zirconium-containing dielectric layer, and a gate electrode. The zirconium-containing dielectric layer is over the interfacial layer and is in tetragonal-phase. The gate electrode is over the zirconium-containing dielectric layer.

Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a front side of a wafer, the wafer having a plurality of dies at the front side of the wafer, the first dielectric layer having a first shrinkage ratio smaller than a first pre-determined threshold; curing the first dielectric layer at a first temperature, where after curing the first dielectric layer, a first distance between a highest point of an upper surface of the first dielectric layer and a lowest point of the upper surface of the first dielectric layer is smaller than a second pre-determined threshold; thinning the wafer from a backside of the wafer; and performing a dicing process to separate the plurality of dies into individual dies.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A package includes an interposer, wherein the interposer includes a first waveguide and a first reflector that is optically coupled to the first waveguide; an optical package attached to the interposer, wherein the optical package includes a second waveguide; and a second reflector that is optically coupled to the second waveguide, wherein the second reflector is vertically aligned with the first reflector.

Abstract: An electronic package is provided and includes a first circuit structure having opposite first and second surfaces; an electronic component set including a first electronic component and a second electronic component and having opposite first and second sides, wherein the first electronic component is located on the first side and has opposite first active surface and first inactive surface, the second electronic component has opposite second active surface and second inactive surface, and a part of the second active surface protrudes and is exposed from an outside of the first electronic component to electrically connect to the first surface; and an encapsulating layer defining opposite first encapsulating surface and second encapsulating surface, wherein the second encapsulating surface is connected to the first surface. As such, the overall height of the electronic package can be reduced and the heat dissipation efficiency of the electronic package can be improved also.

Abstract: The present disclosure belongs to the technical field of heat exchangers, and provides a heat exchanger based on a Gyroid/Diamond (GD-type) hybrid minimal surface-based disturbance structure. The heat exchanger includes a core, headers, and flanges. The core includes a cold fluid channel and a hot fluid channel, the cold fluid channel and the hot fluid channel are separated by a parting sheet. An inlet and an outlet of the cold fluid channel are separated from an inlet and an outlet of the hot fluid channel by sealing bars. A GD-type hybrid minimal surface-based disturbance structure is inserted into the hot fluid channel. A cold fluid and a hot fluid are distributed in a cross-flow manner.

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

Abstract: A semiconductor device includes a photonic die and an optical die. The photonic die includes a grating coupler and an optical device. The optical device is connected to the grating coupler to receive radiation of predetermined wavelength incident on the grating coupler. The optical die is disposed over the photonic die and includes a substrate with optical nanostructures. Positions and shapes of the optical nanostructures are such to perform an optical transformation on the incident radiation of predetermined wavelength when the incident radiation passes through an area of the substrate where the optical nanostructures are located. The optical nanostructures overlie the grating coupler so that the incident radiation of predetermined wavelength crosses the optical die where the optical nanostructures are located before reaching the grating coupler.

Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to improve the efficacy of fertilizer usage and absorption by cotton plants. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the fertilized soil in which the cotton seeds are planted and grown. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the fertilized soil around the cotton plants.

Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.

Abstract: Disclosed are a sequence generation method, a sequence generation apparatus and a non-transitory computer-readable storage medium. The sequence generation method may include generating a first sequence according to a pre-generated random sequence, and using the first sequence as a reference signal sequence. The first sequence has a plurality of elements which are all in a form of complex numbers and have a same modulus value, a phase difference between two adjacent elements is less than ?/2, and the modulus value is an amplitude value indicating signal strength.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.

Abstract: A method of manufacturing a semiconductor device includes: forming a substrate over the substrate, the substrate defining a logic region and a memory region; depositing a bottom electrode layer across the logic region and the memory region; depositing a magnetic tunnel junction (MTJ) layer over the bottom electrode layer; depositing a first conductive layer over the MTJ layer; depositing a sacrificial layer over the first conductive layer; etching the sacrificial layer in the memory region to expose the first conductive layer in the memory region while keeping the first conductive layer in the logic region covered; depositing a second conductive layer in the memory region and the logic region; patterning the second conductive layer to expose the MTJ layer in the memory region; and etching the patterned second conductive layer and the MTJ layer to form a top electrode and an MTJ, respectively, in the memory region.