Abstract: A resistive memory device includes a dielectric layer, a first via connection structure, a first stacked structure, and a first insulating structure. The first via connection structure is disposed in the dielectric layer. The first stacked structure is disposed on the first via connection structure and the dielectric layer. The first insulating structure penetrates through a portion of the first stacked structure in a vertical direction and divides the first stacked structure into a first cell unit and a second cell unit. The first cell unit and the second cell unit include a first shared bottom electrode, and the first insulating structure is disposed directly on the first shared bottom electrode.

Abstract: A mechanical end-effector for minimally invasive surgery (MIS) equipped with a mechanochromic indicator for providing the surgeon with visual indication of the force applied upon a tissue is disclosed. The indicator includes a polymeric matrix functionalized with mechanochromic molecules, wherein a prepolymer/curing agent weight ratio used for preparing the matrix is in the range 1:1-15:1 and the percentage by weight of the mechanochromic molecules in the matrix is in the range 0.1-5%.

Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.

Abstract: A chip package structure is provided. The chip package structure includes a first wiring substrate including a substrate, a first pad, a second pad, and an insulating layer. The chip package structure includes a nickel-containing layer over the first pad. The chip package structure includes a conductive protection layer over the nickel-containing layer. The conductive protection layer includes tin, and a recess is surrounded by the conductive protection layer and the insulating layer over the first pad. The chip package structure includes a chip over the second surface of the substrate. The chip package structure includes a conductive bump between the second pad and the chip.

Abstract: Glasses with gesture recognition function include a glasses frame and a gesture recognition system. The gesture recognition system is disposed on the glasses frame and configured to detect hand gestures in front of the glasses thereby generating a control command. The gesture recognition system transmits the control command to an electronic device to correspondingly control the electronic device.

Abstract: A driving mechanism is provided, including a base, a movable unit, and a movable part. The movable unit is movably disposed on the base and connected to an optical element. The movable part is movably disposed on the base and forms a passage. When the movable part moves from the first position to the second position relative to the base, the movable unit can slide relative to the base from its initial position through the passage to a closed position.

Abstract: A ReRAM device includes an interlayer dielectric (ILD), a lower conductive plug, a resistance-switching element (RSE) and an upper conductive plug. The ILD has an upper surface. The lower conductive plug is disposed in the ILD, and has a top surface lower than the upper surface. The RSE is disposed above the top surface and electrically contacts with the top surface. The upper conductive plug is disposed above the RSE and electrically contacts with the RSE.

Abstract: A light source device includes a light guide plate, an optical adhesive, and a light source element. The light guide plate includes a light guide substrate and an enhancement layer. The light guide substrate has a light incident surface, a first surface, and a second surface. The first surface is opposite to the second surface, and the light incident surface extends between the first surface and the second surface. The enhancement layer is disposed on the light guide substrate. A thickness of the enhancement layer is from 1 micrometer to 25 micrometers and a first refractive index of the light guide substrate is greater than a second refractive index of the enhancement layer. The optical adhesive is interposed between the first surface of the light guide substrate and the optical adhesive. The light source element is disposed beside the light incident surface to emit light toward the light incident surface.

Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.

Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first electrode, a second electrode on one side of the first electrode, and a resistive switching film between the first electrode and the second electrode. The first electrode, the resistive switching film and the second electrode are arranged along the first direction. The second semiconductor structure includes a first via and a first metal layer on the first via along a second direction and electrically connected to the first via. The first direction is perpendicular to the second direction. An upper surface of the first electrode, an upper surface of the second electrode, an upper surface of the resistive switching film and an upper surface of the first metal layer are coplanar.

Abstract: Glasses with gesture recognition function include a glasses frame and a gesture recognition system. The gesture recognition system is disposed on the glasses frame and configured to detect hand gestures in front of the glasses thereby generating a control command. The gesture recognition system transmits the control command to an electronic device to correspondingly control the electronic device.

Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.

Abstract: A resistive memory device includes a dielectric layer, a via connection structure, a stacked structure, and an insulating structure. The via connection structure is disposed in the dielectric layer. The stacked structure is disposed on the via connection structure and the dielectric layer. The insulating structure penetrates through the stacked structure in a vertical direction and divides the stacked structure into a first memory cell unit and a second memory cell unit. The first memory cell unit includes a first bottom electrode, and the second memory cell unit includes a second bottom electrode separated from the first bottom electrode by the insulating structure. The via connection structure is electrically connected with the first bottom electrode and the second bottom electrode.

Abstract: The present disclosure provides a semiconductor manufacturing method and a system therefore. The semiconductor manufacturing method includes: providing a gas from a container through an outlet to a semiconductor wafer manufacturing equipment, wherein a control valve is connected to the outlet to control a gas flow; retrieving a set of parameters corresponding to the gas flow; and determining a nominal position of the control valve by incorporating the set of parameters through a processor in order to provide a desired flow passage into the semiconductor wafer manufacturing equipment, wherein the semiconductor wafer manufacturing equipment includes a plurality of independent reaction chambers, wherein each reaction chamber is individually supplied with a gas pipe, and each gas pipe receives the gas from the container.

Abstract: The present disclosure relates to a semiconductor device with a hybrid fin-dielectric region. The semiconductor device includes a substrate, a source region and a drain region laterally separated by a hybrid fin-dielectric (HFD) region. A gate electrode is disposed above the HFD region and the HFD region includes a plurality of fins covered by a dielectric and separated from the source region and the drain region by the dielectric.

Abstract: A backlight module includes a first and a second light guide plate; a turning film; a first, a second, and a third light source module. The first light guide plate has a first light entrance surface, a first light-emitting surface, a first bottom surface, and a light guide structure formed on the first bottom surface. The second light guide plate is disposed above the first light-emitting surface and has a second light-emitting surface, a second bottom surface, a second light entrance surface, a third light entrance surface, and optical microstructures, wherein the second and the third light entrance surface are located on two opposite sides of the second light guide plate. The turning film is disposed between the two light guide plates. The first, the second, and the third light source module are disposed aside the first, the second, and the third light entrance surface, respectively.

Abstract: A backlight module includes a light guide plate and a light source module. The light guide plate includes a light receiving surface, a light exit surface, and a bottom surface. The light exit surface is connected to a first end of the light receiving surface. The bottom surface is connected to a second end of the light receiving surface opposite to the first end and located opposite to the light exit surface. The bottom surface includes a central region and a peripheral girdle region at least partially surrounding the central region. The central region includes a plurality of first reflecting structures, and the peripheral girdle region includes a plurality of second reflecting structures. The second reflecting structure is different from the first reflecting structure. The light source module is disposed along the light receiving surface and provides light beams incident into the light receiving surface.

Abstract: A semiconductor substrate stage for carrying a substrate is provided. The semiconductor substrate stage includes a base layer, a magnetic shielding layer disposed on the base layer, a carrier layer disposed on the magnetic shielding layer, a receiver disposed on the carrier layer, a storage layer disposed between the base layer and the magnetic shielding layer, and a magnetic shielding element disposed on the carrier layer and surrounding the receiver.

Abstract: The present invention provides a pharmaceutical composition and method for having cytotoxic activity to interact with cancer cells and destroy the cancer cells.

Abstract: The present invention provides a pharmaceutical composition and method for having cytotoxic activity to interact with cancer cells and destroy the cancer cells.