Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.

Abstract: An example computing device includes a first housing portion, a second housing portion moveably connected to the first housing portion, a link to selectively secure the second housing portion to the first housing portion to inhibit movement of the second housing portion relative to the first housing portion, and a shape-memory alloy element to release the link to allow the second housing portion to move relative to the first housing portion.

Abstract: A phase recovery device includes a phase recovery module and a residual phase recovery module. The phase recovery module performs a first-stage phase recovery on a received signal to generate a first phase recovered signal. The residual phase recovery module performs a second-stage phase recovery on the first phase-recovered signal to generate a second phase recovered signal.

Abstract: A communication system includes a receiving circuit and a phase error estimating circuit. The receiving circuit receives an input signal x, which has an input phase ? in a polar coordinate system. According to partial differentiation performed on the natural logarithm of a function f(x, ?), the phase error estimating circuit generates an estimated phase error of the input signal x. f(x, ?) represents a probability function of receiving the input signal x at the receiving circuit.

Abstract: A signal processing system includes a variable gain amplifier, an analog-to-digital converter (ADC), a gain compensation module and a signal processing module. The variable gain amplifier applies a variable gain to an analog input signal to generate an amplified analog signal. The ADC converts the amplified analog signal to an amplified digital signal. The gain compensation module applies a compensation gain to the amplified digital signal to generate a compensated signal. The compensated signal has an instantaneous change lower than a predetermined threshold. The signal processing module performs a signal processing procedure on the compensated signal.

Abstract: A communication system includes a receiving circuit and a phase error estimating circuit. The receiving circuit receives an input signal x, which has an input phase ? in a polar coordinate system. According to partial differentiation performed on the natural logarithm of a function f(x, ?), the phase error estimating circuit generates an estimated phase error of the input signal x. f(x, ?) represents a probability function of receiving the input signal x at the receiving circuit.

Abstract: A signal processing system includes a variable gain amplifier, an analog-to-digital converter (ADC), a gain compensation module and a signal processing module. The variable gain amplifier applies a variable gain to an analog input signal to generate an amplified analog signal. The ADC converts the amplified analog signal to an amplified digital signal. The gain compensation module applies a compensation gain to the amplified digital signal to generate a compensated signal. The compensated signal has an instantaneous change lower than a predetermined threshold. The signal processing module performs a signal processing procedure on the compensated signal.

Abstract: A circuit substrate includes: a substrate; an insulating coating layered structure formed on the substrate, having top and bottom surfaces, and formed with a patterned recess that is indented inwardly from the top surface, that is disposed above the bottom surface, and that is defined by a recess-defining wall, the recess-defining wall having a bottom wall portion and a surrounding wall portion that extends upwardly from a periphery of the bottom wall portion; and a patterned metallic layered structure including an electroless plating metal layer formed on the bottom wall portion of the recess-defining wall.

Abstract: A method for manufacturing bioactive glass includes the steps below. A precursor and a polar solvent are mixed to form a mixed solution, in which the precursor includes a silicon precursor, a calcium precursor and a phosphorus precursor. The mixed solution is atomized to form a mixture droplet. The mixture droplet is oxidized in an environment of 500° C. to 900° C. to form the bioactive glass.

Abstract: The present invention provides a method of preventing corrosion of a titanium layer in a semiconductor wafer. The semiconductor wafer comprises a dielectric layer, a column-shaped tungsten plug embedded in the dielectric layer and having its top surface cut to be at the same level as that of the dielectric layer, a titanium layer positioned on the top of the dielectric layer and covering a portion of the top surface of the tungsten plug, a main conductive layer positioned on the surface of the titanium layer, a photoresist layer positioned on the surface of the main conductive layer, and a polymer layer scattered on the surface of the semiconductor wafer. The method is first to utilize a dry cleaning process to strip off the photoresist layer and the polymer layer, then to perform a nitridizing process to make the surface of the titanium layer exposed on the surface of the semiconductor wafer generate a titanium nitride layer.