Patents by Inventor Yu-Jen Yu

Yu-Jen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6563154
    Abstract: An improved method for depositing the polysilicon layer from which a gate pedestal is later formed is described. Deposition takes place in two stages. Initially, the conventional deposition temperature of about 630° C. is used. Then, when the intended thickness of polysilicon has been grown, the temperature is ramped down to about 560° C., without interrupting the deposition process, and growth of the film continues to completion. This is followed by a standard doping step using POCl3. Polysilicon films formed in this way have been found to have very smooth surfaces because the topmost layer is less subject to uncontrolled grain growth. As a consequence, dielectric layers obtained by oxidizing such films exhibit superior breakdown voltages.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: May 13, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chun-Chieh Chang, Yu-Jen Yu, Te-Fu Tseng, Chao-Yi Lan
  • Patent number: 5961725
    Abstract: An apparatus for producing thin film coatings and/or dopant levels on semiconductor wafers or other substrates with improved film growth uniformity (of thickness and composition) and/or dopant uniformity is provided. The apparatus is positioned in a furnace tube between the wafers and a gas inlet. The apparatus comprises a conical shaped baffle.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: October 5, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Lang Wang, Yu-Jen Yu
  • Patent number: 5874333
    Abstract: An improved method for depositing the polysilicon layer from which a gate pedestal is later formed is described. Deposition takes place in two stages. Initially, the conventional deposition temperature of about 630.degree. C. is used. Then, when the intended thickness of polysilicon has been grown, the temperature is ramped down to about 560.degree. C., without interrupting the deposition process, and growth of the film continues to completion. This is followed by a standard doping step using POCl.sub.3. Polysilicon films formed in this way have been found to have very smooth surfaces because the topmost layer is less subject to uncontrolled grain growth. As a consequence, dielectric layers obtained by oxidizing such films exhibit superior breakdown voltages.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: February 23, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chang, Yu-Jen Yu, Te-Fu Tseng, Chao-Yi Lan
  • Patent number: 5838716
    Abstract: A method of testing a dry oxidation furnace for leaks which permit the entry of moisture into the oxidizing ambient is described. Such moisture, when present in sufficient concentration, can cause a high degree of boron depletion in silicon at p-type contact interfaces in the manufacture of p-channel MOSFETs. The depleted silicon presents a high resistance component to the contact thereby compromising its performance. A test wafer is subjected to a non-oxidizing ambient in the furnace according to a prescribed procedure. Measurements of the thickness of an oxide layer on the test wafer before and after the procedure indicate the presence of a leak of sufficient proportions to cause a deterioation of contact performance if the oxide grown during the test procedure exceeds between about 25 to 35 Angstroms. The procedure is also useful as a simple means of monitoring an oxidation furnace to provide a record of performance and signal the development of trends which suggest appropriate remedial maintenance.
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: November 17, 1998
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hui-Hua Chang, Yu-Jen Yu, Chi-Fu Ni
  • Patent number: 5792701
    Abstract: An apparatus for producing thin film coatings and/or dopant levels on semiconductor wafers or other substrates with improved film growth uniformity (of thickness and composition) and/or dopant uniformity is provided. The apparatus is positioned in a furnace tube between the wafers and a gas inlet. The apparatus comprises a conical shaped baffle.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: August 11, 1998
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Lang Wang, Yu-Jen Yu