Patents by Inventor Yu-Juan Chan

Yu-Juan Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9231048
    Abstract: A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Di An, Chien-Hung Chen, Yu-Juan Chan
  • Publication number: 20130292754
    Abstract: A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor.
    Type: Application
    Filed: June 28, 2013
    Publication date: November 7, 2013
    Inventors: Chi-Di AN, Chien-Hung CHEN, Yu-Juan CHAN
  • Patent number: 8497540
    Abstract: A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: July 30, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Di An, Chien-Hung Chen, Yu-Juan Chan
  • Publication number: 20130049088
    Abstract: A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Di AN, Chien-Hung Chen, Yu-Juan Chan