Patents by Inventor Yu-Jung Chen

Yu-Jung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142237
    Abstract: A localization device and a localization method for a vehicle are provided. The localization device includes an inertia measurer, an encoder, an image capturing device, and a processor. The processor obtains an encoded data by the encoder to generate a first odometer data, obtains an inertial data by the inertia measurer to generate a heading angle estimation data, and obtains an environmental image data by the image capturing device to generate a second odometer data. In a first fusion stage, the processor fuses the heading angle estimation data and the first odometer data to generate first fusion data. In a second fusion stage, the processor fuses the first fusion data, the heading angle estimation data and the second odometer data to generate pose estimation data corresponding to the localization device.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Jhong Chen, Pei-Jung Liang, Ren-Yi Huang
  • Publication number: 20240145302
    Abstract: A semiconductor device and a method for manufacturing an interconnecting metal layer thereof are provided. The semiconductor device includes a gate layer, a dielectric layer, an insulating layer, an epitaxial layer, and a sidewall liner. The dielectric layer is disposed on one side of the gate layer, the insulating layer is disposed on another side of the gate layer, the epitaxial layer is located on the insulating layer, and the sidewall liner penetrates the dielectric layer and the gate layer, and one end of the sidewall liner is connected to the epitaxial layer. The sidewall liner is converted from a high-k material to a low-k material by hydrogen and oxygen plasma treatments.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Shien SHIAH, Bor Chiuan HSIEH, Tsai-Jung HO, Meng-Ku CHEN, Tze-Liang LEE
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11953738
    Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 9, 2024
    Assignee: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang, Wei-Jyun Chen, Yu-Jyuan Dai
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240097662
    Abstract: An integrated circuit includes an upper threshold circuit configured to set a logic level of a first enabling signal, a lower threshold circuit configured to set a logic level of a second enabling signal, and a control circuit configured to change an output voltage signal in response to a condition that the logic level of the first enabling signal and the logic level of the second enabling signal are changed consecutively. In the control circuit, a first switch is electrically connected to a second switch at a buffer output node. The control circuit includes a regenerative circuit configured to maintain the output voltage signal at the buffer output node while each of the first switch and the second switch is at a disconnected state.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Kai TSAI, Chia-Hui CHEN, Chia-Jung CHANG
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11937405
    Abstract: A system includes a rack of servers and a fluid circuit for cooling the rack of servers. The fluid circuit includes one or more cooling modules, a heat-exchanging module, and a pump. The one or more cooling modules are thermally connected to a conduit for flowing a coolant therethrough. Each cooling module includes a heat-exchanger thermally connected to the conduit and a chiller fluidly coupled to the heat-exchanger. The heat-exchanging module is fluidly connected to an outlet of the conduit. The pump is configured to drive the coolant from the heat-exchanging module to each server in the rack of servers.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: March 19, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu Nien Huang, Sin-Hong Lien, Jen-Mao Chen
  • Publication number: 20240087960
    Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Lien HUANG, Ching-Feng FU, Huan-Just LIN, Fu-Sheng LI, Tsai-Jung HO, Bor Chiuan HSIEH, Guan-Xuan CHEN, Guan-Ren WANG
  • Patent number: 11927202
    Abstract: A fan guard for a fan container includes a housing and a plurality of wings. The housing has a hollow interior defined by a cylindrical inner surface. The housing extends longitudinally between a first housing end and a second housing end. The plurality of wings is positioned within the hollow interior of the housing. Each wing of the plurality of wings extends radially, from a center of symmetry of the cylindrical inner surface to the cylindrical inner surface. Each wing of the plurality of wings is radially curved between the first housing end and the second housing end.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: March 12, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Herman Tan
  • Patent number: 11921552
    Abstract: A computer chassis includes walls defining an airspace containing heat-generating components (e.g., storage drives). The airspace is divided into first and second regions, such as by a printed circuit board supporting the heat-generating components within the first region. An air input feeds both the first region and second region. Input air going through the first region first passes by a forward set of heat-generating components before continuing to a rearward set of heat-generating components to extract heat therefrom. Input air going through the second region bypasses the forward set of heat-generating components before being directed out through an air opening partway down the length of the chassis, after which this air passes by a rearward set of heat-generating components to extract heat.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 5, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Jen-Hui Wang
  • Publication number: 20240072129
    Abstract: A structure of flash memory cell includes a substrate. A floating gate is disposed on the substrate. A low dielectric constant (low-K) spacer is disposed on a sidewall of the floating gate. A trench isolation structure has a base part disposed in the substrate and a protruding part above the substrate protruding from the base part. The low-K spacer is sandwiched between the floating gate and the protruding part of the trench isolation structure.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chih-Jung Chen, Yu-Jen Yeh
  • Publication number: 20230310791
    Abstract: A head-mounted device for reducing symptoms of cybersickness includes a main shell, and a stimulation unit. The main shell includes first, second and third tube bodies that are arc-shaped and that are worn respectively on the top and back of the user’s head and the user’s ear. The stimulation unit includes first, second and third components that are received respectively in the first, second and third tube bodies, that are movable in a rolling, sliding or flowing manner with low friction, and that are configured to generate and transmit a stimulation force, through one end of the respective one of the first, second and third tube bodies, to the use’s vestibular system in respond to movement of the user’s head.
    Type: Application
    Filed: July 5, 2022
    Publication date: October 5, 2023
    Applicant: National Tsing Hua University
    Inventors: Yun-Ju LEE, Yu-Jung CHEN
  • Publication number: 20230244942
    Abstract: Apparatuses, systems, and techniques to modify tensors based on processor requirements. In at least one embodiment, input tensors and weight tensors are modified to meet processing resource requirements.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 3, 2023
    Inventors: Chong Yu, Zhihao Xie, Jia Liu, Niall Dunan Emmart, Jingyang Zhu, Yu-Jung Chen
  • Publication number: 20200359001
    Abstract: A camera module includes a circuit board, two photosensitive chips fixed on a surface of the circuit board, two lens assemblies respectively mounted over the two photosensitive chips, two filter assemblies each including a visible light filter and an infrared filter, and an infrared projection unit fixed on a surface of the circuit board and projecting patterned infrared light. The filter assemblies respectively correspond to the photosensitive chips and the lens assemblies. The visible light filter and the infrared filter of the filter assemblies are switched to be between the lens assembly and the photosensitive chip. When the visible light filters are between the lenses and the photosensitive chips, the photosensitive chips acquire visible light to form a colored 3D image. When the infrared filters are between the lenses and the photosensitive chips, the photosensitive chips acquire reflected patterned infrared light to form an infrared 3D image.
    Type: Application
    Filed: May 30, 2019
    Publication date: November 12, 2020
    Inventors: YI-MOU HUANG, YE-QUANG CHEN, SHIN-WEN CHEN, YU-JUNG CHEN, HO-KAI LIANG
  • Patent number: 10781265
    Abstract: A humanized anti-Globo H antibody, or an scFv or Fab fragment thereof, comprising a heavy-chain variable domain having three complementary regions consisting of HCDR1, HCDR2, and HCDR3 and a light-chain variable domain having three complementary regions consisting of LCDR1, LCDR2, and LCDR3, wherein the sequence of HCDR1 is GYISSDQILN (SEQ ID NO:4), the sequence of HCDR2 is RIYPVTGVTQYXHKFVG (SEQ ID NO:5, wherein X is any amino acid), and the sequence of HCDR3 is GETFDS (SEQ ID NO:6), wherein the sequence of LCDR1 is KSNQNLLX?SGNRRYZLV (SEQ ID NO:7, wherein X? is F, Y, or W, and Z is C, G, S or T), the sequence of LCDR2 is WASDRSF (SEQ ID NO:8), and the sequence of LCDR3 is QQHLDIPYT (SEQ ID NO:9).
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: September 22, 2020
    Assignee: Development Center for Biotechnology
    Inventors: Chia-Cheng Wu, Szu-Liang Lai, Yu-Jung Chen, Chih-Yung Hu, Tzu-Yin Lin
  • Publication number: 20200048365
    Abstract: A humanized anti-Globo H antibody, or an scFv or Fab fragment thereof, comprising a heavy-chain variable domain having three complementary regions consisting of HCDR1, HCDR2, and HCDR3 and a light-chain variable domain having three complementary regions consisting of LCDR1, LCDR2, and LCDR3, wherein the sequence of HCDR1 is GYISSDQILN (SEQ ID NO:4), the sequence of HCDR2 is RIYPVTGVTQYXHKFVG (SEQ ID NO:5, wherein X is any amino acid), and the sequence of HCDR3 is GETFDS (SEQ ID NO:6), wherein the sequence of LCDR1 is KSNQNLLX?SGNRRYZLV (SEQ ID NO:7, wherein X? is F, Y, or W, and Z is C, G, S or T), the sequence of LCDR2 is WASDRSF (SEQ ID NO:8), and the sequence of LCDR3 is QQHLDIPYT (SEQ ID NO:9).
    Type: Application
    Filed: May 24, 2018
    Publication date: February 13, 2020
    Applicant: Development Center for Biotechnology
    Inventors: Chia-Cheng Wu, Szu-Liang Lai, Yu-Jung Chen, Chih-Yung Hu, Tzu-Yin Lin
  • Patent number: 10488037
    Abstract: A combustible sky lantern includes a combustible base frame and a combustible hot air balloon. The combustible base frame includes a combustion carrier and an envelope-connecting rim. The combustion carrier combustion carrier is used for positioning fixedly a combustible object to be ignited as a flame source. The envelope-connecting rim is connected with the combustion carrier. The combustible hot air balloon, fixed to the envelope-connecting rim, is to contain thereinside a heated air generated by burning the combustible object. After a fire at the combustible object spreads to the combustion carrier, the fire would further spread orderly to the envelope-connecting rim and the combustible hot air balloon.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: November 26, 2019
    Assignee: TSHU-BI CO., LTD.
    Inventors: Yu-Cheng Chen, Yu-Jung Chen
  • Publication number: 20190309092
    Abstract: The present invention provides a modified antigen-binding Fab fragment. An antigen-binding molecule comprising the antigen-binding Fab fragment and a composition comprising the molecule are also provided.
    Type: Application
    Filed: July 20, 2017
    Publication date: October 10, 2019
    Applicant: Development Center for Biotechnology
    Inventors: Chih-Yung HU, Chao-Yang HUANG, Yu-Jung CHEN, Chia-Cheng WU, Chien-Tsun KUAN, Chia-Hsiang LO, Hsien-Yu TSAI