Patents by Inventor Yu-Kai CHANG

Yu-Kai CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10432856
    Abstract: Methods and apparatus of compression for pre-stitched pictures captured by multiple cameras of a panoramic video capture device are disclosed. At the encoder side, stitching information associated with a stitching process to form the pre-stitched pictures is used to encode a current block according to embodiments of the present invention, where the stitching information comprises calibration data, matching results, seam position, blending level, sensor data, or a combination thereof. In one embodiment, the stitching information corresponds to matching results associated with a projection process, and projection-based Inter prediction is used to encode the current block by projecting a reference block in a reference pre-stitched picture to coordinates of the current block. In another embodiment, the stitching information corresponds to seam information associated with seam detection, and seam-based Inter prediction is used to encode the current block by utilizing the seam information.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: October 1, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tsui-Shan Chang, Yu-Hao Huang, Chih-Kai Chang, Tsu-Ming Liu
  • Patent number: 10408875
    Abstract: A testing system includes a subtractor and a divider. The subtractor is configured to receive a first voltage of a circuit being tested and a second voltage of the circuit, and to derive a difference between the first voltage and the second voltage. The divider is configured to receive the difference between the first voltage and the second voltage, and to derive a resistance of the circuit by dividing (i) the difference between the first voltage and the second voltage by (ii) a difference between a first current applied to the circuit and a second current applied to the circuit. The first voltage is corresponding to the first current, and the second voltage is corresponding to the second current.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: September 10, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Jung Chang, Wei-Kai Liao, Ming-Ching Lin, Kuei-Hao Tseng
  • Publication number: 20190273023
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yip LOH, Chih-Wei CHANG, Hong-Mao LEE, Chun-Hsien HUANG, Yu-Ming HUANG, Yan-Ming TSAI, Yu-Shiuan WANG, Hung-Hsu CHEN, Yu-Kai CHEN, Yu-Wen CHENG
  • Patent number: 10366626
    Abstract: A method for facilitating handwriting practice includes: generating handwriting strokes in response to user input of user-writing strokes; generating an input image that includes the handwriting strokes, and that has a shape similar to a shape of a standard image associated with a standard word character; scaling the input image to generate a scaled image with a size that is the same as a size the standard image; overlapping the standard image and the scaled image; comparing an nth handwriting stroke in the scaled image with an nth standard stroke in a standard order of the standard word character; and when the nth handwriting stroke does not correspond in position to the nth standard stroke, displaying a notification of a stroke order error.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: July 30, 2019
    Assignee: NATIONAL TAIWAN NORMAL UNIVERSITY
    Inventors: Hsien-Sheng Hsiao, Chia-Hou Wu, Rong-Long Chang, Yu-Kai Chang
  • Publication number: 20190182057
    Abstract: A power over Ethernet device is provided. The power over Ethernet device includes a first Ethernet connector, an Ethernet transformer circuit, and a detection circuit. The first Ethernet connector is coupled to a second Ethernet connector of a network device via an Ethernet cable and has a first reserve pin and a second reserve pin. The Ethernet transformer circuit is coupled to the first Ethernet connector to provide a supply voltage to the Ethernet cable to transfer the supply voltage to the network device. The detection circuit receives the supply voltage and is coupled to the Ethernet transformer circuit, the first reserve pin, and the second reserve pin to provide a reference voltage to the first reserve pin and receives an identification voltage from the second reserve pin to determine whether the network device is a powered device.
    Type: Application
    Filed: October 16, 2018
    Publication date: June 13, 2019
    Applicant: PEGATRON CORPORATION
    Inventors: Chao-Wen Huang, Yu-Chung Chang, Feng-Liang Lai, Wen-Kai Tai
  • Patent number: 10320304
    Abstract: The present invention provides a power converter, a secondary side controller, and a short circuit determination method for a current sensing resistor of the power converter. The power converter is controlled by a power switch to convert an input voltage to an output voltage, and provide an output current to an output terminal. The power converter senses the output current by a current sensing resistor to generate first information which relates to the output current. The power converter generates second information according to an ON time, an OFF time or a switching period of the power switch, or according to an energy-releasing period for transmitting energy to the output terminal, wherein the second information indicates whether there is a substantial amount of energy transmitted to the output terminal. By checking whether the first information and the second information are contradictory to each other, a malfunction can be found.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: June 11, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Yu-Kai Chen, Kuang-Fu Chang
  • Patent number: 10297702
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: May 21, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Patent number: 10298203
    Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 21, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
  • Patent number: 10290268
    Abstract: A power off indicating apparatus and a power off indicating method thereof are provided. A power off detecting circuit provides a storage voltage to an electrophoretic display when a power is off, so as to control the electrophoretic display to display a power off information. A tag reader resets a display status of the electrophoretic display according to an electronic tag read by the tag reader.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: May 14, 2019
    Assignee: E Ink Holdings Inc.
    Inventors: Yu-Kai Chang, Yu-Hsun Kuo
  • Publication number: 20190073965
    Abstract: A power off indicating apparatus and a power off indicating method thereof are provided. A power off detecting circuit provides a storage voltage to an electrophoretic display when a power is off, so as to control the electrophoretic display to display a power off information. A tag reader resets a display status of the electrophoretic display according to an electronic tag read by the tag reader.
    Type: Application
    Filed: July 5, 2018
    Publication date: March 7, 2019
    Applicant: E Ink Holdings Inc.
    Inventors: Yu-Kai Chang, Yu-Hsun Kuo
  • Publication number: 20180040257
    Abstract: A method for facilitating handwriting practice includes: generating handwriting strokes in response to user input of user-writing strokes; generating an input image that includes the handwriting strokes, and that has a shape similar to a shape of a standard image associated with a standard word character; scaling the input image to generate a scaled image with a size that is the same as a size the standard image; overlapping the standard image and the scaled image; comparing an nth handwriting stroke in the scaled image with an nth standard stroke in a standard order of the standard word character; and when the nth handwriting stroke does not correspond in position to the nth standard stroke, displaying a notification of a stroke order error.
    Type: Application
    Filed: March 22, 2017
    Publication date: February 8, 2018
    Applicant: National Taiwan Normal University
    Inventors: Hsien-Sheng HSIAO, Chia-Hou WU, Rong-Long CHANG, Yu-Kai CHANG