Patents by Inventor Yu KARASAWA

Yu KARASAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • WIRING BOARD ASSEMBLY, WIRING BOARD, AND WIRING BOARD MANUFACTURING METHOD
    Publication number: 20240047283
    Abstract: A wiring board assembly includes a wiring structure and an insulating layer. The insulating layer covers a surface of the wiring structure and includes a slit that exposes a predetermined region on the surface of the wiring structure. An edge portion of the outermost insulating layer corresponding to the edge portion of the slit meanders in a wave-like manner.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 8, 2024
    Inventors: Yu Karasawa, Ryo Miyazawa
  • Wiring substrate and electronic device
    Patent number: 10790236
    Abstract: A wiring substrate includes a first substrate including a wiring layer and a solder resist layer that partially covers the wiring layer. The solder resist layer includes a circular opening partially exposing the wiring layer and a support partially covering the wiring layer within the opening. The wiring layer includes a first connection pad exposed in the opening and formed by a portion of the wiring layer located at an outer side of the support. The wiring substrate further includes a cylindrical connection pin and a bonding member that bonds a first end surface of the connection pin and the first connection pad located in the opening.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: September 29, 2020
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Sachiko Oda, Daisuke Takizawa, Yu Karasawa, Hiroaki Taniguchi
  • WIRING SUBSTRATE AND ELECTRONIC DEVICE
    Publication number: 20190311990
    Abstract: A wiring substrate includes a first substrate including a wiring layer and a solder resist layer that partially covers the wiring layer. The solder resist layer includes a circular opening partially exposing the wiring layer and a support partially covering the wiring layer within the opening. The wiring layer includes a first connection pad exposed in the opening and formed by a portion of the wiring layer located at an outer side of the support. The wiring substrate further includes a cylindrical connection pin and a bonding member that bonds a first end surface of the connection pin and the first connection pad located in the opening.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 10, 2019
    Inventors: Sachiko ODA, Daisuke TAKIZAWA, Yu KARASAWA, Hiroaki TANIGUCHI