Abstract: Proposed are a pigment-type hot stamping foil, a method of manufacturing the same, and a hot-stamped member including the pigment-type hot stamping foil. The pigment-type hot stamping foil includes a carrier film layer, a release layer formed on a lower surface of the carrier film layer, a pigment-type colored coloring layer formed on a lower surface of the release layer, a pigment-type white coloring layer formed on a lower surface of the pigment-type colored coloring layer, a primer layer formed on a lower surface of the pigment-type white coloring layer, a metal deposition layer formed on a lower surface of the primer layer, and an adhesive layer formed on a surface of the metal deposition layer.

Abstract: Proposed are a pigment-type hot stamping foil, a method of manufacturing the same, and a hot-stamped member including the pigment-type hot stamping foil. The pigment-type hot stamping foil includes a carrier film layer, a release layer formed on a lower surface of the carrier film layer, a pigment-type colored coloring layer formed on a lower surface of the release layer, a pigment-type white coloring layer formed on a lower surface of the pigment-type colored coloring layer, a primer layer formed on a lower surface of the pigment-type white coloring layer, a metal deposition layer formed on a lower surface of the primer layer, and an adhesive layer formed on a surface of the metal deposition layer.

Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

Abstract: A capacitor is described. The capacitor includes a lower electrode, a dielectric layer structure disposed on the lower electrode, and an upper electrode disposed on the dielectric layer structure. The dielectric layer structure includes a first dielectric layer, a second dielectric layer contacting the first dielectric layer, and a third dielectric layer contacting the second dielectric layer. Each of the first to third dielectric layers includes a material with a crystalline structure. The second dielectric layer includes an oxide having ferroelectric or antiferroelectric properties, and the second dielectric layer includes a material in which at least two different crystal phases are mixed.

Abstract: A method of fabricating a capacitor includes forming a lower electrode on a semiconductor substrate in a reaction space. A homogeneous oxide layer is formed on the lower electrode. A dielectric layer is formed on the homogeneous oxide layer. An upper electrode is formed on the dielectric layer. The forming of the homogeneous oxide layer includes performing a homogeneous oxide layer forming cycle at least one time. The homogeneous oxide layer forming cycle includes supplying an oxidizing agent, purging the oxidizing agent, and pumping-out the reaction space.

Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

Abstract: Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.