Patents by Inventor Yu-Liang Hsiao

Yu-Liang Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250112197
    Abstract: A semiconductor package includes a carrier substrate comprising a first surface and a second surface opposite to the first surface. A first electronic component and a second electronic component are mounted on the first surface of the carrier substrate in a side-by-side manner. The first electronic component is provided with first data (DQ) pads along a first side directly facing the second electronic component. The second electronic component is provided with second data (DQ) pads along a second side in proximity to the first electronic component. The first DQ pads are directly connects to the second DQ pads through first bond wires.
    Type: Application
    Filed: September 23, 2024
    Publication date: April 3, 2025
    Applicant: MEDIATEK INC.
    Inventors: Yu-Liang Hsiao, Ming-Hsien Chou
  • Publication number: 20240347479
    Abstract: A semiconductor package includes a package substrate having a top surface and an opposing bottom surface. The package substrate includes a top build-up wiring layer and an upper dielectric layer covering the top build-up wiring layer. A semiconductor device and a passive component are mounted on the top surface of the package substrate in a side-by-side manner. A molding compound encapsulates the semiconductor device and the passive component on the top surface of the package substrate. A cavity is disposed between the passive component and the top surface of the package substrate.
    Type: Application
    Filed: March 20, 2024
    Publication date: October 17, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chu-Chia Chang, Pei-Haw Tsao, Peng-Yu Huang, Yu-Liang Hsiao, Wei-Fan Chen
  • Patent number: 11694972
    Abstract: A semiconductor package includes a substrate, a semiconductor die mounted on the substrate, and a heatsink over the semiconductor die. The heatsink includes a roof portion and at least one connecting portion extending between the roof portion and the substrate. The at least one connecting portion includes a connection lead mounted on a connection pad of the substrate. The connection pad includes a first portion and a second portion spaced apart from each other, which are configured to electrically couple to different voltage signals, respectively, for detecting heatsink floating.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: July 4, 2023
    Assignee: MEDIATEK INC.
    Inventors: Kuang-Han Chang, Yu-Liang Hsiao, Chih-An Yang
  • Publication number: 20210384142
    Abstract: A semiconductor package includes a substrate, a semiconductor die mounted on the substrate, and a heatsink over the semiconductor die. The heatsink includes a roof portion and at least one connecting portion extending between the roof portion and the substrate. The at least one connecting portion includes a connection lead mounted on a connection pad of the substrate. The connection pad includes a first portion and a second portion spaced apart from each other, which are configured to electrically couple to different voltage signals, respectively, for detecting heatsink floating.
    Type: Application
    Filed: June 2, 2021
    Publication date: December 9, 2021
    Inventors: Kuang-Han Chang, Yu-Liang Hsiao, Chih-An Yang