Patents by Inventor Yu Liao
Yu Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12094997Abstract: A method includes forming image sensors in a semiconductor substrate. A first alignment mark is formed close to a front side of the semiconductor substrate. The method further includes performing a backside polishing process to thin the semiconductor substrate, forming a second alignment mark on the backside of the semiconductor substrate, and forming a feature on the backside of the semiconductor substrate. The feature is formed using the second alignment mark for alignment.Type: GrantFiled: July 25, 2022Date of Patent: September 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih Wei Sung, Chung-Bin Tseng, Keng-Ying Liao, Yen-Jou Wu, Po-Zen Chen, Su-Yu Yeh, Ching-Chung Su
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Publication number: 20240305896Abstract: An information handling system includes a camera, a neutral density (ND) filter, and a processor. The camera captures video images for display on a display device of the information handling system. The processor communicates with the camera. The processor determines a brightness level of an ambient light and a first shutter speed of the camera. The processor sets a stop level for the ND filter based on the brightness level of the ambient light and the first shutter speed. In response to the stop level of the ND filter being set, the processor sets the camera to a second shutter speed.Type: ApplicationFiled: March 8, 2023Publication date: September 12, 2024Inventors: Chien-Chih Liao, Shiong Kheng Chua, Paul Yu
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Publication number: 20240306446Abstract: A display substrate has a display region and a dummy pixel region including at least one pixel missing region and a redundant region; the display substrate includes a base substrate and a driving circuit layer including a plurality of circuit units, at least one of which includes a pixel driving circuit and initial signal lines; the pixel driving circuit includes first and second pixel driving circuits in the display region and the redundant region, respectively, and a capacitance value of a storage capacitor in the first pixel driving circuit is less than that in the second pixel driving circuit; the initial signal lines include first and second initial signal lines extending along first and second directions, respectively; the first initial signal line is electrically connected to at least a part of the second initial signal lines crossing the first initial signal line.Type: ApplicationFiled: March 31, 2022Publication date: September 12, 2024Inventors: Huijuan YANG, Tingliang LIU, Yi ZHANG, Xiaoqing SHU, Maoying LIAO, Yu WANG
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Publication number: 20240302579Abstract: An electronic device is provided. The electronic device includes a substrate, a first light-shielding layer, a second light-shielding layer, a third light-shielding layer and an optical sensing element. The first light-shielding layer is disposed on the substrate and has a first opening. The second light-shielding layer is disposed on the first light-shielding layer and has a second opening. The third light-shielding layer is disposed on the second light-shielding layer and has a third opening. The optical sensing element is disposed on the substrate, and overlapped with the first opening. In addition, in a top-view diagram, centers of the first opening, the second opening and the third opening are separated from each other along a first direction, and the first direction is a line connecting a center of the first opening and a center of the third opening.Type: ApplicationFiled: May 20, 2024Publication date: September 12, 2024Inventors: Te-Yu LEE, Yu-Tsung LIU, Wei-Ju LIAO, Po-Hsin LIN, Chao-Yin LIN
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Publication number: 20240303408Abstract: The application discloses a method and a system for shaping flexible blocks on a chip canvas in an integrated circuit design. An input is received describing geometric features of flexible blocks. A set of flexible blocks are generated based on the input. Obtained block areas of the set of flexible blocks are computed. Whether the set of flexible blocks are legal is determined based on determining whether area differences between the obtained block areas and a plurality of required areas for the set of flexible blocks meet a requirement. The set of flexible blocks are updated until the set of flexible blocks are all legal.Type: ApplicationFiled: March 7, 2024Publication date: September 12, 2024Inventors: Kun-Yu WANG, Sheng-Tai TSENG, Yi-Ying LIAO, Jen-Wei LEE, Ronald Kuo-Hua HO, Bo-Jiun HSU, Te-Wei CHEN, Chun-Chih YANG, Tai-Lai TUNG
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Patent number: 12088995Abstract: A speaker is provided and includes a first speaker body, a second speaker body, a speaker component, and a sound transmission member. The first speaker body has a first chamber. The second speaker body has a second chamber. The second speaker body is received in the first chamber and defines a resonant cavity in the first chamber. The speaker component is disposed on the second speaker body and includes a supporting member, a magnet, a coil, and a diaphragm. Two ends of the supporting member are respectively inserted into the second chamber and fixed on the second speaker body. The magnet is disposed in the supporting member. The diaphragm is disposed on the supporting member and abuts against the second speaker body. The coil is received in the magnet and is connected to the diaphragm. The sound transmission member is coaxially disposed in the resonant cavity with the speaker component.Type: GrantFiled: August 31, 2022Date of Patent: September 10, 2024Assignee: LANTO ELECTRONIC LIMITEDInventors: Kuan-Chun Liao, Chiao-Fan Huang, Chih-Chiang Cheng, You-Yu Lin, Hui-Yu Wang
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Patent number: 12089180Abstract: In an example method, a user equipment (UE) determines a first identifier assigned to the UE for use on a first wireless communications network and one or more first time slots for monitoring the first wireless communication networks. The UE determines a second identifier assigned to the UE for use on a second wireless communications network and one or more second time slots for monitoring the second wireless communication networks. The UE determines that the one or more first time slots at least partially overlap the one or more second time slots, and in response, transmits to the second wireless communications network, a request for a third identifier to be assigned to the UE for use on the second wireless communications network and/or a request that the one or more second time slots be offset by an interval of time.Type: GrantFiled: May 28, 2020Date of Patent: September 10, 2024Assignee: Apple Inc.Inventors: Alexandre Saso Stojanovski, Ching-Yu Liao, Sudeep Palat, Sheetal Bhasin
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Publication number: 20240294424Abstract: Methods of etching a plurality of glass-based sheets comprise sorting a plurality glass-based sheets into a plurality of groups based on an average sheet thickness of a corresponding glass-based sheet. A maximum difference between a first average sheet thickness of a first sheet and a second average sheet thickness of a second sheet of a first group of the plurality of groups is less than or equal to a predefined threshold. Methods can further comprise sorting the first group into a plurality of sub-groups based on a total thickness variation. Methods of etching a glass-based sheet comprise placing the glass-based sheet in a jig, where a second edge is closer to the perimeter support than the first edge is to the perimeter support. Methods of etching a glass-based sheet comprise placing the glass-based sheet in a jig, where a first edge is closest to a top side of the jig.Type: ApplicationFiled: June 23, 2022Publication date: September 5, 2024Inventors: ChaHyun Ku, ChihYuan Liao, Yu-Jiung Lin
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Patent number: 12080036Abstract: An image processing method including the following steps is provided. An image information of an image is received, wherein the image includes a plurality of blocks and the image information includes a plurality of pixel information of each block. A dual gamma correction is performed on a first group of blocks of the image to obtain one or more corrected blocks and the dual gamma correction is skipped on a second group of blocks of the image to obtain a plurality of uncorrected blocks. A first encoding process is performed on the one or more corrected blocks to obtain a plurality of first encoded blocks. A second encoding process different from the first encoding process is performed on the plurality of uncorrected blocks to obtain a plurality of second encoded blocks.Type: GrantFiled: May 24, 2023Date of Patent: September 3, 2024Assignee: Novatek Microelectronics Corp.Inventors: Hui-Yu Jiang, Heng-Yao Lin, Yen-Tao Liao
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Patent number: 12080587Abstract: An apparatus includes a susceptor and a non-reactive gas source. The susceptor has through holes and a wafer support surface. Each through hole includes a lift pin and a lift pin head. The lift pin has a vertical degree of motion in the through hole to lift up or place a wafer on the susceptor. The lift pin head has at least one flow channel structure running from its first surface at least partially exposed to a bottom side of the susceptor through its second surface exposed to a top side of the susceptor wherein the lift pin. The non-reactive gas source is configured to flow a gas to a backside of the wafer through the flow channel structure through the bottom side of the susceptor.Type: GrantFiled: August 14, 2020Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Yu Chen, Wei-Jen Chen, Yi-Chen Chiang, Tsang-Yang Liu, Chang-Sheng Lee, Wei-Chen Liao, Wei Zhang
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Publication number: 20240289528Abstract: Method and system for automatically checking a circuit layout of a PCB are disclosed. The method includes acquiring routing constraint information in an automatic table format, converting the routing constraint information from the automatic table format into a readable table format and generating routing constraint information in the readable table format, inputting the routing constraint information in the readable table format into a PCB layout software in a plug-in manner for the PCB layout software to acquire a corresponding circuit routing rule, acquiring, after routing ends, a data file outputted by the PCB layout software, and generating a check report by comparing and checking the data file and the routing constraint information. With the method, the constraint information is automatically inputted into the PCB layout software, and a check report is automatically generated for correcting errors on a circuit layout in the layout software, to improve circuit layout efficiency.Type: ApplicationFiled: August 14, 2023Publication date: August 29, 2024Inventors: PI-HSIEN LIAO, MING-YU CHENG, HO-WEN CHEN
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Publication number: 20240290875Abstract: A semiconductor device includes a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, a first mesa isolation on the HEMT region, a HEMT on the first mesa isolation, a second mesa isolation on the capacitor region, and a capacitor on the second mesa isolation. The semiconductor device further includes buffer layer between the substrate, the first mesa isolation, and the second mesa isolation, in which bottom surfaces of the first mesa isolation and the second mesa isolation are coplanar.Type: ApplicationFiled: May 6, 2024Publication date: August 29, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Kuo-Yu Liao
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Patent number: 12074206Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.Type: GrantFiled: August 30, 2021Date of Patent: August 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen
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Patent number: 12074156Abstract: A memory array includes a first memory cell configured to store data, a second memory cell configured to store data and a bit line extending along the first direction, and being over the first memory cell and the second memory cell. The first memory cell and the second memory cell are arranged along a first direction in a first column of memory cells. The bit line includes a first conductor extending in the first direction and being in a first conductive layer, and a second conductor extending in the first direction and being in a second conductive layer different from the first conductive layer.Type: GrantFiled: March 25, 2021Date of Patent: August 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hidehiro Fujiwara, Sahil Preet Singh, Chih-Yu Lin, Hsien-Yu Pan, Yen-Huei Chen, Hung-Jen Liao
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Publication number: 20240284644Abstract: The present disclosure relates to the technical field of heat dissipation for electronic devices, and discloses a manifold microchannel heat sink based on directional optimization of hotspot areas, including a power module, a heat dissipation substrate, a cold source device, and a diverter manifold; the heat dissipation substrate is arranged on the power module, a microchannel is provided on a side of the heat dissipation substrate away from the power module and on a back of a heat generating area of the power module for carrying the power module and dissipating heat from the power module. According to the manifold microchannel heat sink based on the directional optimization of hotspot areas, the local heat dissipation performance of the power module may be preliminarily changed by optimizing the microchannel on the heat dissipation substrate, which avoids poor heat dissipation temperature uniformity in a multi-heat source system.Type: ApplicationFiled: March 27, 2023Publication date: August 22, 2024Applicant: Huazhong University of Science and TechnologyInventors: Zhiqiang WANG, Yu LIAO, Guoqing XIN, Xiaojie SHI, Yong KANG
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Publication number: 20240282140Abstract: An electronic device are provided. The electronic device includes a display panel and an optical sensing module. The optical sensing module is disposed on a side of the display panel and includes an optical sensing layer, an optical assembly, and a light-blocking element. The optical assembly is disposed between the optical sensing layer and the display panel. The light-blocking element overlaps a portion of the optical sensing layer in a normal direction of the optical sensing layer. The optical assembly includes a plurality of light-blocking layers, and at least a portion of the plurality of light-blocking layers have different-sized openings.Type: ApplicationFiled: April 25, 2024Publication date: August 22, 2024Inventors: Te-Yu LEE, Yu-Tsung LIU, Wei-Ju LIAO
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Publication number: 20240276290Abstract: This disclosure describes systems, methods, and devices related to RAN compute QoS modeling. A device may decode a compute task request message received from a user equipment (UE), the compute task request message comprising an indication of a compute task to be offloaded to the RAN and data of the compute task. The device may establish a RAN compute service function (SF) based on support initiated by a service orchestration and chaining function (SOCF). The device may establish a RAN compute bearer based on RAN compute QoS flow with the UE, wherein the RAN compute QoS flow spans between the UE, the RAN, and the RAN compute SF.Type: ApplicationFiled: August 11, 2022Publication date: August 15, 2024Inventors: Sangeetha BANGOLAE, Zongrui DING, Sudeep PALAT, Alexandre Saso STOJANOVSKI, Qian LI, Youn Hyoung HEO, Thomas LUETZENKIRCHEN, Ching-Yu LIAO, Abhijeet KOLEKAR
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Publication number: 20240270999Abstract: A self-healing resin composition includes 35 phr to 110 phr of a main resin, 10 phr to 30 phr of a self-healing component, a hardener, a matting agent, and a solvent. The main resin contains a diol monomer and a diisocyanate monomer. The self-healing component includes at least one of a cyclosiloxane and a self-healing component as represented in a formula (I) of: R1 is formed from a first isocyanate, R2 is formed from a second isocyanate, and R3 is selected from the group consisting of: “x” is an integer ranging from 3 to 50. “y” is an integer ranging from 3 to 50. “m” is an integer ranging from 3 to 50. “n1” is an integer ranging from 3 to 50. “n2” is an integer ranging from 3 to 50.Type: ApplicationFiled: May 7, 2023Publication date: August 15, 2024Inventors: TE-CHAO LIAO, CHUN-CHE TSAO, Ren-Yu Liao
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Patent number: 12062562Abstract: Air curtain devices can reduce defects on semiconductor wafers when implemented on a track equipped with robotic wafer transport. The air curtain devices can be added to one or more processing devices arranged along the track to prevent defects from landing on wafer surfaces. For example, the air curtain devices can prevent volatile organic solvent mist from drifting towards processing devices on the track and preventing contamination via a wafer transport system.Type: GrantFiled: November 1, 2021Date of Patent: August 13, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Chih Liao, Shih-Yu Tseng
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Patent number: 12063616Abstract: Technology for an Information Centric Networking gateway (ICN-GW) operable to modify an ICN message received from a user equipment (UE) in a Fifth Generation (5G) cellular network is disclosed. The ICN-GW can decode the ICN message received from the UE via a Next Generation NodeB (gNB) and an ICN point of attachment (ICN-PoA). The ICN-GW can modify the ICN message to produce a modified ICN message. The ICN-GW can encode the modified ICN message to route the modified ICN message to a data network.Type: GrantFiled: September 27, 2023Date of Patent: August 13, 2024Assignee: APPLE INC.Inventors: Gabriel Arrobo Vidal, Geng Wu, Qian Li, Zongrui Ding, Ching-Yu Liao