Abstract: A heat sink assembly includes an air duct, a heat sink and a fan. The air duct defines an air guiding channel therein. The heat sink is configured to contact a heat source to dissipate heat from a heat source. The heat sink includes a plurality of heat pipes. The heat sink is placed on one side of the air guiding channel, and the heat pipes contacts the air duct to transmit heat to the air duct. The fan is placed on the other side of the air guiding channel to communicate with the heat sink via the air duct. The fan forces air to flow through the air guiding channel to the heat sink to dissipate heat on the air duct and the heat sink.

Abstract: A heat sink assembly includes an air duct, a heat sink and a fan. The air duct defines an air guiding channel therein. The heat sink is configured to contact a heat source to dissipate heat from a heat source. The heat sink includes a plurality of heat pipes. The heat sink is placed on one side of the air guiding channel, and the heat pipes contacts the air duct to transmit heat to the air duct. The fan is placed on the other side of the air guiding channel to communicate with the heat sink via the air duct. The fan forces air to flow through the air guiding channel to the heat sink to dissipate heat on the air duct and the heat sink.

Abstract: An electronic device includes a first heat source, a second heat source adjacent to the first heat source, a heat sink, and a fan. The heat sink is mounted on the first heat source for transferring heat from the first heat source to the heat sink. The fan has an air inlet and an air outlet. The air outlet faces the second heat source to drive air flowing through the second heat source if the air inlet faces the heat sink. The air outlet faces the heat sink to drive air flowing through the heat sink if the air inlet faces the second heat source.

Abstract: A photo sense element that is composed of a P-type doped layer, a N-type doped layer, an intrinsic layer, a first electrode corresponding to the P-type doped layer, a second electrode corresponding to the N-type doped layer and a dielectric layer. Wherein, the intrinsic layer is disposed in between the P-type doped layer and the N-type doped layer to form a diode. Moreover, the dielectric layer is disposed in between the P-type doped layer and the first electrode or in between the N-type doped layer and the second electrode to form a dielectric layer capacitor. By using the appropriate circuit design to have the parasitic capacitor formed by the diodes under the reverse bias state in parallel with the dielectric layer capacitor, so the photo sense element has greater capacitance.