Abstract: An electronic package is provided and includes a first circuit structure having opposite first and second surfaces; an electronic component set including a first electronic component and a second electronic component and having opposite first and second sides, wherein the first electronic component is located on the first side and has opposite first active surface and first inactive surface, the second electronic component has opposite second active surface and second inactive surface, and a part of the second active surface protrudes and is exposed from an outside of the first electronic component to electrically connect to the first surface; and an encapsulating layer defining opposite first encapsulating surface and second encapsulating surface, wherein the second encapsulating surface is connected to the first surface. As such, the overall height of the electronic package can be reduced and the heat dissipation efficiency of the electronic package can be improved also.

Abstract: An electronic package is provided and includes a protection layer formed on the electronic structure having a plurality of conductors to cover the plurality of conductors, a dielectric layer having a plurality of grooves to enable the electronic structure to be bonded onto one side of the dielectric layer with the protection layer thereon such that each of the plurality of conductors is correspondingly accommodated in each of the plurality of grooves, and a plurality of conductive components disposed on another side of the dielectric layer. Accordingly, the design of the grooves is used to correspond to the high and low surfaces of the electronic structure such that the problem of poor manufacturing process can be avoided.

Abstract: An electronic package is provided and includes a protection layer formed on the electronic structure having a plurality of conductors to cover the plurality of conductors, a dielectric layer having a plurality of grooves to enable the electronic structure to be bonded onto one side of the dielectric layer with the protection layer thereon such that each of the plurality of conductors is correspondingly accommodated in each of the plurality of grooves, and a plurality of conductive components disposed on another side of the dielectric layer. Accordingly, the design of the grooves is used to correspond to the high and low surfaces of the electronic structure such that the problem of poor manufacturing process can be avoided.

Abstract: An electronic package is provided, in which an electronic element is disposed on an upper side of a circuit structure, a package layer covers the electronic element, and an action structure is embedded in the package layer, so that the action structure is exposed from a surface of the package layer, and then a bonding element is disposed on a lower side of the circuit structure and corresponding to the position of the action structure, so as to form a thermal conduction between the bonding element and the action structure. Therefore, a laser can transfer heat energy to the bonding element via the action structure, so that a solder material on the bonding element can be reflowed.

Abstract: An electronic package is provided and includes a protection layer formed on the electronic structure having a plurality of conductors to cover the plurality of conductors, a dielectric layer having a plurality of grooves to enable the electronic structure to be bonded onto one side of the dielectric layer with the protection layer thereon such that each of the plurality of conductors is correspondingly accommodated in each of the plurality of grooves, and a plurality of conductive components disposed on another side of the dielectric layer. Accordingly, the design of the grooves is used to correspond to the high and low surfaces of the electronic structure such that the problem of poor manufacturing process can be avoided.

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

Abstract: The disclosure provides a substrate construction applicable to a 3D package, including a silicon substrate for carrying a chip on an upper side thereof, and a circuit structure formed underneath the silicon substrate for being connected to solder balls via conductive pads of the circuit structure, thereby obtaining the same specification of the conductive pads as ball-planting pads of conventional package substrates and avoiding the manufacturing and use of conventional package substrates.

Abstract: The disclosure provides a substrate construction applicable to a 3D package, including a silicon substrate for carrying a chip on an upper side thereof, and a circuit structure formed underneath the silicon substrate for being connected to solder balls via conductive pads of the circuit structure, thereby obtaining the same specification of the conductive pads as ball-planting pads of conventional package substrates and avoiding the manufacturing and use of conventional package substrates.