Patents by Inventor Yu-Pen Tsai

Yu-Pen Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7235426
    Abstract: A method for backside grinding a bumped wafer is disclosed. A wafer has a plurality of bumps formed on the active surface thereof. Prior to grinding the back surface of the wafer, a hot-melt adhesive layer is formed on the active surface of the wafer so as to be adhered to the active surface and cover the bumps. Also a grinding film is attached to the hot-melt adhesive layer. After grinding the back surface of the wafer, the grinding film is removed but the hot-melt adhesive layer is remained on the wafer for the following wafer-dicing step.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: June 26, 2007
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Yu-Pen Tsai
  • Publication number: 20070111346
    Abstract: The present invention relates to a laser-marking method for a wafer. The method of the invention comprises the steps of: (a) providing a wafer, the wafer having a first surface and a second surface, and a glue layer disposed on the first surface; (b) attaching the glue layer under a first film, the first film installed on a frame; and (c) projecting a laser light on the second surface of the wafer to mark the wafer. By utilizing the frame, the supporting force can be larger and orientation of the laser can be improved so as to improve the precision for marking the wafer and improve the quality of products.
    Type: Application
    Filed: October 5, 2006
    Publication date: May 17, 2007
    Inventor: Yu-Pen Tsai
  • Patent number: 7105424
    Abstract: A method for forming an underfill layer on a bumped wafer is disclosed. A film is provided wherein the film includes a base layer, a removable layer and the underfill layer. The film is disposed on a bump wafer and then pressing the film under heating is performed to have the bumps of the wafer embedded in the underfill layer. Then, the removable layer with base film attached thereto is removed, so the underfill layer well encloses the bumps of the wafer and is easily separated from the base film layer and the removable layer without damaging the bumps formed on the wafer.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: September 12, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Pen Tsai, Kuo-Pin Yang, Wu-Chung Chiang
  • Publication number: 20060192284
    Abstract: A manufacturing method of forming an encapsulation layer on a back surface of a wafer, the method comprising the steps of: providing the wafer having the back surface and an active surface opposing to the back surface; providing an encapsulation disposed only on the back surface of the wafer, and not disposing the encapsulation over the active surface of the wafer; providing a mold having a mold surface disposed over the encapsulation; heating the mold and moving the mold surface to press the encapsulation simultaneously so as to have the encapsulation distributed over the back surface of the wafer to form the encapsulation layer on the back surface of the wafer; and singulating the wafer into a plurality of chips, wherein the encapsulation layer is formed on a back surface of each chip, and is not formed on a side surface of each chip.
    Type: Application
    Filed: May 1, 2006
    Publication date: August 31, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Pen Tsai, Chih-Chiang Liu, Wei-Min Hsiao
  • Publication number: 20050142837
    Abstract: A method for forming an underfill layer on a bumped wafer is disclosed. A film is provided wherein the film includes a base layer, a removable layer and the underfill layer. The film is disposed on a bump wafer and then pressing the film under heating is performed to have the bumps of the wafer embedded in the underfill layer. Then, the removable layer with base film attached thereto is removed, so the underfill layer well encloses the bumps of the wafer and is easily separated from the base film layer and the removable layer without damaging the bumps formed on the wafer.
    Type: Application
    Filed: November 9, 2004
    Publication date: June 30, 2005
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Pen Tsai, Kuo-Pin Yang, Wu-Chung Chiang
  • Publication number: 20050142696
    Abstract: A method for backside grinding a bumped wafer is disclosed. A wafer has a plurality of bumps formed on the active surface thereof. Prior to grinding the back surface of the wafer, a hot-melt adhesive layer is formed on the active surface of the wafer so as to be adhered to the active surface and cover the bumps. Also a grinding film is attached to the hot-melt adhesive layer. After grinding the back surface of the wafer, the grinding film is removed but the hot-melt adhesive layer is remained on the wafer for the following wafer-dicing step.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 30, 2005
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Yu-Pen Tsai
  • Publication number: 20050067720
    Abstract: A manufacturing method of forming an encapsulation layer on a back surface of a wafer mainly comprises the following steps. Firstly, there is provided a wafer having an active surface and a back surface, wherein the active surface has a plurality of bumps formed thereon. Next, an encapsulation is provided on the back surface of the wafer and a mold is provided to have a mold surface of the mold disposed over the back surface. Afterwards, the mold surface is heated and moved to press the encapsulation simultaneously so as to have the encapsulation entirely distributed over the back surface of the wafer to form the encapsulation layer, with a flat surface, covering the back surface of the wafer.
    Type: Application
    Filed: September 27, 2004
    Publication date: March 31, 2005
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Pen Tsai, Chih-Chiang Liu, Wei-Min Hsiao
  • Publication number: 20040188860
    Abstract: A chip scale package includes a plurality of terminals for making external electrical connections and a chip. The chip has a plurality of bonding pads on an active surface thereof, and the bonding pads of the chip are electrically connected to the terminals. The backside surface of the chip is exposed from a surface of the package. The present invention is characterized by having an ink mark on the backside surface of the chip. The present invention further provides a method for making the chip scale package at the wafer level.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 30, 2004
    Inventors: Yu Pen Tsai, Kuo Pin Yang, Wu Chung Chiang