Patents by Inventor Yu Ping Chang

Yu Ping Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481796
    Abstract: A method for screening bad data columns in a data storage medium comprising a plurality of data columns includes: labeling or recording a plurality of bad data columns as a bad data column group, wherein the bad data columns are selected from the data columns in the data storage medium, each of the bad data column groups labels or records a position and a number of the bad data columns; determining whether the total number of the bad data columns is greater than a total number of the bad data column groups; and if yes, labeling or recording any two bad data columns of the bad data columns spaced apart by P data columns as one of the bad data column groups, wherein P is a positive integer.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: November 19, 2019
    Assignee: SILICON MOTION, INC.
    Inventors: Sheng-Yuan Huang, Yu-Ping Chang
  • Patent number: 10261689
    Abstract: A method for screening bad data columns in a data storage medium comprising a plurality of data columns includes: a) labeling or recording a plurality of bad data columns as bad data column group, wherein the bad data columns are selected from the data columns, and each bad data column group labels or records a position and a number of the bad data columns; b) determining whether at least one bad data column is not labeled or recorded; and c) if yes, labeling or recording any two bad data columns spaced apart by P data columns and the P data columns as one of the bad data column groups, wherein P is a positive integer.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: April 16, 2019
    Assignee: SILICON MOTION, INC.
    Inventors: Sheng-Yuan Huang, Yu-Ping Chang
  • Publication number: 20180314428
    Abstract: A method for screening bad data columns in a data storage medium comprising a plurality of data columns includes: labeling or recording a plurality of bad data columns as a bad data column group, wherein the bad data columns are selected from the data columns in the data storage medium, each of the bad data column groups labels or records a position and a number of the bad data columns; determining whether the total number of the bad data columns is greater than a total number of the bad data column groups; and if yes, labeling or recording any two bad data columns of the bad data columns spaced apart by P data columns as one of the bad data column groups, wherein P is a positive integer.
    Type: Application
    Filed: July 6, 2018
    Publication date: November 1, 2018
    Inventors: Sheng-Yuan Huang, Yu-Ping Chang
  • Publication number: 20170329521
    Abstract: A method for screening bad data columns in a data storage medium comprising a plurality of data columns includes: a) labeling or recording a plurality of bad data columns as bad data column group, wherein the bad data columns are selected from the data columns, and each bad data column group labels or records a position and a number of the bad data columns; b) determining whether at least one bad data column is not labeled or recorded; and c) if yes, labeling or recording any two bad data columns spaced apart by P data columns and the P data columns as one of the bad data column groups, wherein P is a positive integer.
    Type: Application
    Filed: August 23, 2016
    Publication date: November 16, 2017
    Inventors: Sheng-Yuan Huang, Yu-Ping Chang
  • Patent number: 9312892
    Abstract: The present invention discloses a digital pre-distortion circuit capable of compensating an analog circuit for its non-linear characteristic. An embodiment of said digital pre-distortion circuit comprises: a pre-distortion training circuit and a pre-distortion circuit. Said pre-distortion training circuit is operable to process a digital feedback signal according to a Cholesky Decomposition related algorithm and thereby generate a plurality of coefficients in which the digital feedback signal is derived from an output signal of the analog circuit and the output signal of the analog circuit is derived from an original digital signal; and said pre-distortion circuit is operable to process the original digital signal according to the plurality of coefficients under a compensation mode and thereby generate a digital pre-distortion signal whose non-linear characteristic is able to compensate the non-linear characteristic of the analog circuit.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: April 12, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Yu-Ping Chang
  • Publication number: 20160036472
    Abstract: The present invention discloses a digital pre-distortion circuit capable of compensating an analog circuit for its non-linear characteristic. An embodiment of said digital pre-distortion circuit comprises: a pre-distortion training circuit and a pre-distortion circuit. Said pre-distortion training circuit is operable to process a digital feedback signal according to a Cholesky Decomposition related algorithm and thereby generate a plurality of coefficients in which the digital feedback signal is derived from an output signal of the analog circuit and the output signal of the analog circuit is derived from an original digital signal; and said pre-distortion circuit is operable to process the original digital signal according to the plurality of coefficients under a compensation mode and thereby generate a digital pre-distortion signal whose non-linear characteristic is able to compensate the non-linear characteristic of the analog circuit.
    Type: Application
    Filed: March 25, 2015
    Publication date: February 4, 2016
    Inventor: YU-PING CHANG
  • Patent number: 9032540
    Abstract: An access system including a storage medium and a host is disclosed. The storage medium includes an identification code. The host includes a processor, at least one connection port and an identification port. The processor executes a mass-production application program. The connection port is coupled to at least one electronic product. The identification port is coupled to the storage medium. When the mass-production application program is executed, the processor determines whether the identification code matches a key code. When the identification code matches the key code, the processor writes mass-production data to the electronic product.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: May 12, 2015
    Assignee: Silicon Motion, Inc.
    Inventor: Yu-Ping Chang
  • Publication number: 20140137266
    Abstract: An access system including a storage medium and a host is disclosed. The storage medium includes an identification code. The host includes a processor, at least one connection port and an identification port. The processor executes a mass-production application program. The connection port is coupled to at least one electronic product. The identification port is coupled to the storage medium. When the mass-production application program is executed, the processor determines whether the identification code matches a key code. When the identification code matches the key code, the processor writes mass-production data to the electronic product.
    Type: Application
    Filed: June 10, 2013
    Publication date: May 15, 2014
    Inventor: Yu-Ping CHANG
  • Patent number: 8207532
    Abstract: A new method is provided for the creation of a hole through a layer of insulating material. The method provides for combining a feed-forward method with a feed backward method and a high-polymer based hole profile, in order to establish a hole of a constant Critical Dimension for the hole bottom, making the CD of the hole bottom independent of the CD of the opening created through the overlying developed layer of photoresist and independent of the thickness of the layer of insulator material after CMP has been applied to the surface of the insulation layer.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: June 26, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chi-An Kao, Yung-Chang Chang, Yu-Ping Chang, Ling-Sung Wang
  • Publication number: 20050059251
    Abstract: A new method is provided for the creation of a hole through a layer of insulating material. The method provides for combining a feed-forward method with a feed backward method and a high-polymer based hole profile, in order to establish a hole of a constant Critical Dimension for the hole bottom, making the CD of the hole bottom independent of the CD of the opening created through the overlying developed layer of photoresist and independent of the thickness of the layer of insulator material after CMP has been applied to the surface of the insulation layer.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 17, 2005
    Inventors: Chi-An Kao, Yung-Chang Chang, Yu-Ping Chang, Ling-Sung Wang
  • Patent number: 6569784
    Abstract: A new layer of RPO is provided for semiconductor devices, specifically for semiconductor device having sub-micron device feature size. The layer of RPO that is provided by the invention comprises a layer of silicon-rich CVD oxide, having a refractive index of between about 1.57 and 1.60 to prevent silicon atoms that are present in a layer of polysilicon from diffusing into the overlying layer of resist protect oxide.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: May 27, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ling Sung Wang, Ping Chun Wei, Chih Jen Wu, Yu Ping Chang, Su Ching Yuan, Jyh-Terng Shih