Abstract: The present invention provides a method for forming a semiconductor device, comprising the following steps: firstly, a substrate is provided, having a NMOS region and a PMOS region defined thereon, next, a gate structure is formed on the substrate within the NMOS region, and a disposal spacer is formed on two sides of the gate structure, afterwards, a mask layer is formed on the PMOS region to expose the NMOS region, next, a recess is formed on two sides of the gate structure spaced from the gate structure by the disposal spacer within the NMOS region, the disposal spacer is then removed after the recess is formed, and an epitaxial layer is formed into the recess.

Abstract: A method of forming a gate structure on a fin structure includes the steps of providing a fin structure covered by a first silicon oxide layer, a silicon nitride layer, a gate material and a cap material in sequence, wherein the silicon nitride layer contacts the first silicon oxide layer. Later, the cap material is patterned to form a first cap layer and the gate material is patterned to form a first gate electrode by taking the silicon nitride layer as an etching stop layer. Then, the silicon nitride layer not covered by the first gate electrode is removed to expose part of the first silicon oxide layer. Finally, a first dielectric layer is formed to conformally cover the first silicon oxide layer, the first gate electrode and the first cap layer.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure formed over the semiconductor substrate, and an epitaxial structure formed partially within the semiconductor substrate. A vertically extending portion of the epitaxial structure extends vertically above a top surface of the semiconductor substrate in an area adjacent the gate structure. A laterally extending portion of the epitaxial structure extends laterally at an area below the top surface of the semiconductor substrate in a direction toward an area below the gate structure and beyond an area where the epitaxial structure extends vertically. The device further includes an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure. A top surface of the laterally extending portion of the epitaxial structure directly contacts the interlayer dielectric layer.

Abstract: A light-emitting device is provided. comprises: a light-emitting stack comprising an active layer emitting a first light having a first peak wavelength ? nm; and an adjusting element stacked on and electrically connected to the active layer, wherein the adjusting element comprises a diode emitting a second light having a second peak wavelength between 800 nm and 1900 nm; wherein a forward voltage of the light-emitting device is between (1240/0.8?) volt and (1240/0.5?) volt, and a ratio of the intensity of the first light emitted from the active layer at the first peak wavelength to the intensity of the second light emitted from the diode at the second peak wavelength is greater than 10 and not greater than 1000.

Abstract: A method for forming a semiconductor device includes steps as follows: Firstly, a semiconductor substrate having a circuit element with at least one spacer formed thereon is provided. Next, an acid treatment is performed on a surface of the spacer. A disposable layer is then formed on the circuit element and the spacer. Thereafter, an etching process is performed to form at least one recess in the semiconductor substrate adjacent to the circuit element. Subsequently, a selective epitaxial growth (SEG) process is performed to form an epitaxial layer in the recess.

Abstract: The invention disclosed a method for forming shallow trenches of the dual active regions. Firstly, forming an etch stop layer on a semiconductor substrate; secondly, using a first accurate photomask to expose and develop the semiconductor substrate, until the etch stop layer has been exposed on the top of the first shallow trench regions and the second shallow trench regions; thirdly, etching the etch stop layer entirely in the exposed regions; fourthly, using a second photomask to expose and develop the first shallow trench regions which require a deeper etch depth of the trench than that of the second shallow trench regions; fifthly, etching and forming preliminary entirely depth in the first shallow trench regions, and then removing the second photomask; at last, taking the etch stop layer as a mask, and simultaneously etching the first shallow trench regions and the second shallow trench regions to form the first hallow trenches and the second shallow trenches having different depths.

Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, a gate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.

Abstract: The invention disclosed a method for forming shallow trenches of the dual active regions. Firstly, forming an etch stop layer on a semiconductor substrate; secondly, using a first accurate photomask to expose and develop the semiconductor substrate, until the etch stop layer has been exposed on the top of the first shallow trench regions and the second shallow trench regions; thirdly, etching the etch stop layer entirely in the exposed regions; fourthly, using a second photomask to expose and develop the first shallow trench regions which require a deeper etch depth of the trench than that of the second shallow trench regions; fifthly, etching and forming preliminary entirely depth in the first shallow trench regions, and then removing the second photomask; at last, taking the etch stop layer as a mask, and simultaneously etching the first shallow trench regions and the second shallow trench regions to form the first hallow trenches and the second shallow trenches having different depths.

Abstract: A semiconductor process including the following steps is provided. An epitaxial layer is formed on a substrate. An oxide layer is formed on the epitaxial layer, wherein the oxide layer includes a chemical oxide layer, a high-temperature oxide (HTO) layer or a surface modification oxide layer. An ion implant process is performed to the epitaxial layer to form a doped region in the epitaxial layer. The oxide layer is removed by using a diluted hydrofluoric acid (DHF) solution after performing the ion implant process, wherein a volume ratio of water to a hydrofluoric acid (HF) in the DHF solution is 200:1 to 1000:1.

Abstract: A light-emitting device comprises a carrier; a first semiconductor element formed on the carrier and comprising a first semiconductor structure and a second semiconductor structure, wherein the second semiconductor structure is closer to the carrier than the first semiconductor structure is, the first semiconductor structure comprises a first active layer emitting a first light having a first dominant wavelength during a normal operation, and the second semiconductor structure comprises a second active layer; and a bridge on a side surface of the second active layer of the second semiconductor structure.

Abstract: A voltage level shift circuit comprises a first pair of transistors and a second pair of transistors. A first transistor of the second pair of transistors is coupled with an input signal terminal. A second transistor of the transistors of the second pair of transistors is coupled with an inverted input signal terminal. The transistors of the second pair of transistors are cross-coupled with the transistors of the first pair of transistors. The voltage level shift circuit also comprises a third pair of transistors. The transistors of the third pair of transistors are coupled with the transistors of the first pair of transistors and the transistors of the second pair of transistors. A first transistor of the third pair of transistors is directly coupled with an output signal terminal and second transistor of the third pair of transistors is directly coupled with an inverted output signal terminal.

Abstract: A light-emitting device is provided. The light-emitting device comprises: a light-emitting stack having an active layer emitting first light having a peak wavelength ? nm; and an adjusting element stacked electrically connected to the active layer in series for tuning a forward voltage of the light-emitting device; wherein the forward voltage of the light-emitting device is between (1240/0.8?) volt and (1240/0.5?) volt.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure formed over the semiconductor substrate, and an epitaxial structure formed partially within the semiconductor substrate. A vertically extending portion of the epitaxial structure extends vertically above a top surface of the semiconductor substrate in an area adjacent the gate structure. A laterally extending portion of the epitaxial structure extends laterally at an area below the top surface of the semiconductor substrate in a direction toward an area below the gate structure and beyond an area where the epitaxial structure extends vertically. The device further includes an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure. A top surface of the laterally extending portion of the epitaxial structure directly contacts the interlayer dielectric layer.

Abstract: A method for filling gaps of semiconductor device and a semiconductor device with insulation gaps formed by the same are provided. First, a silicon substrate with plural protruding portions is provided, and the protruding portions are spaced apart from each other by gaps with predetermined depths. A nitride-containing layer is formed above the silicon substrate for covering the protruding portions and surfaces of the gaps as a liner nitride. Then, an amorphous silicon layer is formed on the nitride-containing layer. An insulating layer is formed on the amorphous silicon layer, and the gaps are filled up with the insulating layer.

Abstract: A method of etching a shallow trench is disclosed in the present invention. By removing the photoresist layer immediately at the end point of the hard mask layer etching and further using the improved process conditions etch the top of the substrate at the same time of the hard mask layer over-etching, such as a lower bias power, a higher pressure and a bigger polymer gases flow rate, the present invention has formed a smooth morphology on the top of the shallow trench. Therefore, the sharp corner appeared in the prior art is avoided by changing the start point of the silicon substrate etching, so as to fundamentally eliminate the leakage current caused by the sharp corner.

Abstract: A light-emitting device comprises a carrier; and a first semiconductor element comprising a first semiconductor structure and a second semiconductor structure, wherein the second semiconductor structure is closer to the carrier than the first semiconductor structure is to the carrier, the first semiconductor structure comprises a first MQW structure configured to emit a first light having a first dominant wavelength during normal operation, and the second semiconductor structure comprises a second MQW structure configured not to emit light during normal operation.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes fin shaped structures and a recessed insulating layer. The fin shaped structures are disposed on a substrate. The recessed insulating layer covers a bottom portion of each of the fin shaped structures to expose a top portion of each of the fin shaped structures. The recessed insulating layer has a curve surface and a wicking structure is defined between a peak and a bottom of the curve surface. The wicking structure is disposed between the fin shaped structures and has a height being about 1/12 to 1/10 of a height of the top portion of the fin shaped structures.

Abstract: A method for keeping remote connection, an electronic device, and a server are provided. After establishing a first network connection, the electronic device enters a power-saving state from an operation state. While operating in the power-saving state, a communication module of the electronic device continuously detects a keep-alive packet transmitted by the server via the first network connection. If an error of reception of the keep-alive packet occurs, the electronic device returns to the operation state from the power-saving state in response to a wake-up signal, so as to re-establish a second network connection between the electronic device and the server.

Abstract: An apparatus for semiconductor wafer treatment includes a wafer holding unit configured to receive a single wafer, at least a solution supply unit configured to apply a solution onto the wafer and an irradiation unit configured to emit irradiation to the wafer. The irradiation unit further includes at least a plurality of first light sources configured to emit irradiation in FIR range and a plurality of second light sources configured to emit irradiation in UV range.

Abstract: A fin field effect transistor (FinFET) on a silicon-on-insulator and method of forming the same are provided in the present invention. The FinFET includes first fin structure, second fin structure and an insulating layer. The first fin structure and the second fin structure are disposed on a substrate. The insulating layer covers the first fin structure and the second fin structure and exposes a first portion of the first fin structure and a second portion of the second fin structure. The first fin structure has a first height and the second fin structure has a second height different from the first height, and a top surface of the first fin structure and a top surface of the second fin structure are at different levels.