Abstract: An object pose estimation system, an execution method thereof and a graphic user interface are provided. The execution method of the object pose estimation system includes the following steps. A feature extraction strategy of a pose estimation unit is determined by a feature extraction strategy neural network model according to a scene point cloud. According to the feature extraction strategy, a model feature is extracted from a 3D model of an object and a scene feature is extracted from the scene point cloud by the pose estimation unit. The model feature is compared with the scene feature by the pose estimation unit to obtain an estimated pose of the object.

Abstract: In a method and an optical time-of-flight sensor for determining distance values d, di by an optical time-of-flight method, an illumination light 40 is emitted which is modulated with a modulation frequency f and a modulation phase q. Reflected light 42 is acquired as an output signal Rx and evaluated by acquisition of a phase shift ? between the illumination light 40 and the reflected light 42, so that an output signal d, di with at least one distance value d is generated. Distance values d, di are determined for a sequence of successive frames, with a plurality of acquisitions being made in each frame in the form of micro-frames ?F1-?F8 with different modulation phases ?. A sequence of modulation phases ?1-?4 of the micro-frames ?F1-?F8 is specified for each frame. In order to achieve a particularly high reliability of the data supplied, the order of the modulation phases ?1-?4 changes. A self-calibration and self-verification take place in an initialization step (60).

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: A memory device includes an alternating layer stack including conductive/dielectric layer pairs stacked in a first direction, a first insulating layer on the alternating layer stack, a thickness of the first insulating layer being larger than a thickness of the dielectric layer, and a channel structure extending through the alternating layer stack and the first insulating layer along the first direction. The channel structure includes an epitaxial layer disposed at a first end of the channel structure away from the first insulating layer, a functional layer on the epitaxial layer and extending along the first direction, a channel layer covering a sidewall of the functional layer and in contact with the epitaxial layer, and a filling structure covering a sidewall of the channel layer.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: A method for forming a 3D memory device is disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a plurality of channel holes penetrating the alternating dielectric stack; forming a channel structure in each channel hole; forming a channel column structure on the channel structure in each channel hole; trimming an upper portion of each channel column structure to form a channel plug; and forming a top selective gate cut between neighboring channel plugs.

Abstract: A training data generation device includes a virtual scene generation unit, an orthographic virtual camera, an object-occlusion determination unit, an object-occlusion determination unit and a perspective virtual camera. The virtual scene generation unit is configured for generating a virtual scene, wherein the virtual scene comprises a plurality of objects. The orthographic virtual camera is configured for capturing a vertical projection image of the virtual scene. The object-occlusion determination unit is configured for labeling an occluded-state of each object according to the vertical projection image. The perspective virtual camera is configured for capturing a perspective projection image of the virtual scene. The training data generation unit is configured for generating a training data of the virtual scene according to the perspective projection image and the occluded-state of each object.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: An object pose estimation system, an execution method thereof and a graphic user interface are provided. The execution method of the object pose estimation system includes the following steps. A feature extraction strategy of a pose estimation unit is determined by a feature extraction strategy neural network model according to a scene point cloud. According to the feature extraction strategy, a model feature is extracted from a 3D model of an object and a scene feature is extracted from the scene point cloud by the pose estimation unit. The model feature is compared with the scene feature by the pose estimation unit to obtain an estimated pose of the object.

Abstract: A calibration system for robot tool including a robot arm adopting a first coordinate system, a tool arranged on a flange of the robot arm, and an imaging device adopting a second coordinate system is disclosed, wherein an image sensing area is established by the image device. A calibration method is also disclosed and includes steps of: controlling the robot arm to move for leading a tool working point (TWP) of the tool enters the image sensing area; recording a current gesture of the robot arm as well as a specific coordinate of the TWP currently in the second coordinate system; obtaining a transformation matrix previously established for describing a relationship between the first and the second coordinate systems; and importing the specific coordinate and the current gesture to the transformation matrix for calculating an absolute position of the TWP in the first coordinate system.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: A system for detecting electronic components includes a light-source device, a photography device, an adjustment device, and an image-processing device. The light-source device generates a light to illuminate at least one pin of a first electronic component at different rotation angles. The photography device senses the light and generates first and second images corresponding to the pin of the first electronic component at different rotation angles. The adjustment device adjusts the photography device and the light-source device to a first height and a second height, wherein the first images correspond to the first height and the second images correspond to the second height. The image-processing device calculates first feature information of the pin of the first electronic component according the first and second images, and analyzes the state of the pin of the first electronic component according to the first feature information.

Abstract: A method for forming a 3D memory device is disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a plurality of channel holes penetrating the alternating dielectric stack; forming a channel structure in each channel hole; forming a channel column structure on the channel structure in each channel hole; trimming an upper portion of each channel column structure to form a channel plug; and forming a top selective gate cut between neighboring channel plugs.

Abstract: A system for detecting electronic components includes a light-source device, a photography device, an adjustment device, and an image-processing device. The light-source device generates a light to illuminate at least one pin of a first electronic component at different rotation angles. The photography device senses the light and generates first and second images corresponding to the pin of the first electronic component at different rotation angles. The adjustment device adjusts the photography device and the light-source device to a first height and a second height, wherein the first images correspond to the first height and the second images correspond to the second height. The image-processing device calculates first feature information of the pin of the first electronic component according the first and second images, and analyzes the state of the pin of the first electronic component according to the first feature information.

Abstract: A method for forming a 3D memory device is disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a plurality of channel holes penetrating the alternating dielectric stack; forming a channel structure in each channel hole; forming a channel column structure on the channel structure in each channel hole; trimming an upper portion of each channel column structure to form a channel plug; and forming a top selective gate cut between neighboring channel plugs.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads. where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: An electronic-component assembly system is provided in the invention. The electronic-component assembly system includes a gripping device, a light-source device, a photographing device, and an image-processing device. The gripping device grips an electronic component, wherein the electronic component includes at least one pin. The light-source device includes a light source and emits light of the light source. The photographing device senses the light and generates a plurality of first one-dimensional images corresponding to the pins at different rotation angles. The image-processing device is coupled to the photographing device to receive the plurality of first one-dimensional images.

Abstract: A calibration system for robot tool including a robot arm adopting a first coordinate system, a tool arranged on a flange of the robot arm, and an imaging device adopting a second coordinate system is disclosed, wherein an image sensing area is established by the image device. A calibration method is also disclosed and includes steps of: controlling the robot arm to move for leading a tool working point (TWP) of the tool enters the image sensing area; recording a current gesture of the robot arm as well as a specific coordinate of the TWP currently in the second coordinate system; obtaining a transformation matrix previously established for describing a relationship between the first and the second coordinate systems; and importing the specific coordinate and the current gesture to the transformation matrix for calculating an absolute position of the TWP in the first coordinate system.