Patents by Inventor Yu Seock Yang

Yu Seock Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7320173
    Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: January 22, 2008
    Assignee: LG Electronics Inc.
    Inventors: Sung-Gue Lee, Jung-Ho Hwang, Joon-Wook Han, Sang-Min Lee, Tae-Sik Eo, Yu-Seock Yang
  • Patent number: 7189302
    Abstract: A fabricating method for a multi-layer printed circuit board is provided. The method may include attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to each of the releasing films and a resist layer to each of the first metal films to form a base member. A first connection portion may then be formed on each of the first metal films, and a second connection portion may be integrally formed on each of the first connection portions. A second metal film may then be formed on each of the second connection portions so as to be electrically connected to the connection portions, and, in turn, to the first metal films. Specific portions of the second metal films may be etched to form copper patterns. Upper and lower portions may then be separated by the releasing films to form separate multi-layer printed circuit boards.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: March 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Jung-Ho Hwang, Sung-Gue Lee, Sang-Min Lee, Joon-Wook Han, Tae-Sik Eo, Yu-Seock Yang
  • Patent number: 7049178
    Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: May 23, 2006
    Assignee: LG Electronics Inc.
    Inventors: Yong Il Kim, Sung Gue Lee, Yu Seock Yang
  • Publication number: 20050098347
    Abstract: A fabricating method for a multi-layer printed circuit board comprises the steps of: attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to the releasing film, thereby forming a base member; forming a first connection portion on the first metal film by an electroplating process; forming a connection portion that a second connection portion is integrally formed with the first connection portion on the first connection portion; forming a second metal film on the second connection portion so as to be electrically connected to the connection portion; and etching a specific part of the second metal film and thereby forming copper patterns.
    Type: Application
    Filed: November 5, 2004
    Publication date: May 12, 2005
    Inventors: Jung-Ho Hwang, Sung-Gue Lee, Sang-Min Lee, Joon-Wook Han, Tae-Sik Eo, Yu-Seock Yang
  • Publication number: 20040154162
    Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 12, 2004
    Applicant: LG Electronics Inc.
    Inventors: Sung-Gue Lee, Jung-Ho Hwang, Joon-Wook Han, Sang-Min Lee, Tae-Sik Eo, Yu-Seock Yang
  • Publication number: 20040135246
    Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: LG Electronics Inc.
    Inventors: Yong Il Kim, Sung Gue Lee, Yu Seock Yang
  • Publication number: 20040050708
    Abstract: A plating method for a printed circuit board includes: a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads; a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source; a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it; a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and a fifth step of making the power connection portion and the external power source to be electrically short. With this method, a printed circuit board without a power supply line for gold-plating can be obtained.
    Type: Application
    Filed: August 20, 2003
    Publication date: March 18, 2004
    Applicant: LG ELECTRONICS INC.
    Inventors: Yu-Seock Yang, Sung-Gue Lee, Yong-Soon Jang, Hyung-Kun Kim
  • Patent number: 6706564
    Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: March 16, 2004
    Assignee: LG Electronics Inc.
    Inventors: Yong Il Kim, Sung Gue Lee, Yu Seock Yang
  • Publication number: 20030113955
    Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 19, 2003
    Applicant: LG Electronics Inc.
    Inventors: Yong Il Kim, Sung Gue Lee, Yu Seock Yang