Abstract: An interconnect structure, which may be used for example in a semiconductor device, is disclosed. The interconnect structure includes a contact layer made of a metal; one or more dielectric layers on the contact layer, and a deposited layer made of an insulating material. The interconnect structure further includes a trench through the one or more dielectric layers so that a sidewall surface of the trench is formed by the one or more dielectric layers and a bottom surface of the trench is formed by a portion of the contact layer. The deposited layer is in the trench and a thickness of the insulating material on the sidewall surface of the trench is at least 2.1 times greater than a thickness of the insulating material on the bottom surface of the trench.

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer, a tungsten plug, a conductive plug, and a contact barrier. The dielectric layer is over a semiconductor substrate. The tungsten plug is in the dielectric layer. The conductive plug is on the tungsten plug. The contact barrier includes a sidewall barrier on a sidewall of the conductive plug and a bottom barrier between the conductive plug and the tungsten plug. A thickness of the sidewall barrier is greater than a thickness of the bottom barrier.

Abstract: According to an embodiment of the present disclosure, an analysis apparatus may include a movable carrier, a sample providing device and a first analysis device. The movable carrier has at least one sample carry region, and moves the sample carry region to at least one collection position and an analysis position. The sample providing device provides a plurality of samples, wherein the sample carry region receives a portion of the samples at the collection position. The first analysis device may be aligned to the analysis position, and analyzes the samples on the sample carry region located at the analysis position.