Patents by Inventor Yu-Shen Chen
Yu-Shen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972956Abstract: A lid attach process includes dipping a periphery of a lid in a dipping tank of adhesive material such that the adhesive material attaches to the periphery of the lid. The lid attach process further includes positioning the lid over a die attached to a substrate using a lid carrier, wherein the periphery of the lid is aligned with a periphery of the lid carrier. The lid attach process further includes attaching the lid to the substrate with the adhesive material forming an interface with the substrate. The lid attach process further includes contacting a thermal interface material (TIM) on the die with the lid.Type: GrantFiled: May 22, 2020Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Kuan-Lin Ho, Jason Shen
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Patent number: 11950771Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.Type: GrantFiled: August 16, 2021Date of Patent: April 9, 2024Assignee: UNITED ORTHOPEDIC CORPORATIONInventors: Yan-Shen Lin, Jiann-Jong Liau, Yu-Liang Liu, Teh-Yang Lin, Wen-Chuan Chen
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Publication number: 20240105661Abstract: The present disclosure provides a circuit board with an embedded chip, which includes a dielectric layer, a first circuit layer, a chip, a conductive connector, and an insulating protection layer. The first circuit layer includes at least one first trace in the dielectric layer. The chip is in the dielectric layer and adjacent to the first trace, where the chip includes a plurality of chip pads at an upper surface of the chip. The conductive connector is on the upper surface of the chip and on the first circuit layer, where a lower surface of the conductive connector contacts at least one chip pad of the chip pads and an upper surface of the first trace. The insulating protection layer is on the chip, the first circuit layer, and the conductive connector, where the insulating protection layer contacts the upper surface of the chip.Type: ApplicationFiled: November 8, 2022Publication date: March 28, 2024Inventors: Yu-Shen CHEN, I-Ta TSAI
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Patent number: 11939603Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.Type: GrantFiled: June 21, 2023Date of Patent: March 26, 2024Assignee: HUBEI UNIVERSITYInventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
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Publication number: 20240087974Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
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Patent number: 11926017Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.Type: GrantFiled: May 5, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
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Publication number: 20240064901Abstract: This disclosure provides a circuit board assembly and a manufacturing method thereof. The circuit board assembly includes circuit board, embedded chip, heat dissipation assembly and temperature switch structure. The temperature switch structure includes a first metal layer and a second metal layer stacked on each other. The first metal layer of the temperature switch structure is electrically connected to the circuit board and is thermally coupled to the embedded chip. A thermal expansion coefficient of the first metal layer is different from a thermal expansion coefficient of the second metal layer so that the temperature switch structure is deformed in response to a temperature change of the embedded chip to be in contact with or spaced apart from the second electrically conductive contact of the heat dissipation assembly.Type: ApplicationFiled: October 19, 2022Publication date: February 22, 2024Applicant: UNIMICRON TECHNOLOGY CORP.Inventor: Yu-Shen CHEN
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Patent number: 11792939Abstract: A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.Type: GrantFiled: October 20, 2021Date of Patent: October 17, 2023Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Yu-Shen Chen, Chung-Yu Lan
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Patent number: 11670520Abstract: A packaging method includes steps of: forming first and second wiring layers electrically connected to each other on two opposite surfaces of a substrate; then configuring mother substrate interconnecting bumps on the first wiring layer and along perimeter of a daughter substrate unit, and then cutting along the perimeter of the daughter substrate unit to expose lateral faces of the mother substrate interconnecting bumps and configuring solder materials thereon; then configuring first and second chips on the first and the second wiring layers to form electrical interconnection between the two chips. A package structure enables interconnecting two chips through one single daughter substrate unit with its wiring layers directly connecting with lateral face contacts of the mother carrier substrate through the mother substrate interconnecting bumps.Type: GrantFiled: November 10, 2021Date of Patent: June 6, 2023Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Jia Shiang Chen, Chung-Yu Lan, Yu-Shen Chen
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Publication number: 20230102457Abstract: A packaging method includes steps of: forming first and second wiring layers electrically connected to each other on two opposite surfaces of a substrate; then configuring mother substrate interconnecting bumps on the first wiring layer and along perimeter of a daughter substrate unit, and then cutting along the perimeter of the daughter substrate unit to expose lateral faces of the mother substrate interconnecting bumps and configuring solder materials thereon; then configuring first and second chips on the first and the second wiring layers to form electrical interconnection between the two chips. A package structure enables interconnecting two chips through one single daughter substrate unit with its wiring layers directly connecting with lateral face contacts of the mother carrier substrate through the mother substrate interconnecting bumps.Type: ApplicationFiled: November 10, 2021Publication date: March 30, 2023Inventors: Jia Shiang CHEN, Chung-Yu LAN, Yu-Shen CHEN
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Publication number: 20230058180Abstract: A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.Type: ApplicationFiled: October 20, 2021Publication date: February 23, 2023Inventors: Yu-Shen Chen, Chung-Yu Lan
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Publication number: 20220408547Abstract: A method for manufacturing an embedded component structure includes providing a circuit board having a through hole and a heat dissipation layer; disposing a chip in the through hole; forming a dielectric layer on a first surface and a second surface of the circuit board to seal the chip and cover a lower surface of the heat dissipation layer; removing a first part of the dielectric layer to form a first opening from which a upper surface of the heat dissipation layer is exposed and a second opening from which the lower surface of the heat dissipation layer is exposed; and forming a thermal conductive material layer in the first and the second opening to form a heat dissipation element surrounding the chip. The upper surface of the heat dissipation layer is exposed from the through hole. The chip, the circuit board, and the heat dissipation element are electrically connected.Type: ApplicationFiled: August 25, 2022Publication date: December 22, 2022Applicant: Unimicron Technology Corp.Inventor: Yu-Shen Chen
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Patent number: 11523505Abstract: An embedded component structure includes a circuit board, an electronic component, a first conductive terminal, and a second conductive terminal. The circuit board includes a first electrical connection layer and a second electrical connection layer. The electronic component is embedded in the circuit board and includes a first contact and a second contact. The first conductive terminal and the second conductive terminal respectively at least cover a part of top surfaces and side walls of the first contact and the second contact, and the first electrical connection layer and the second electrical connection layer are respectively electrically connected to the first contact and the second contact through the first conductive terminal and the second conductive terminal. A method for manufacturing an embedded component structure is also provided.Type: GrantFiled: August 19, 2021Date of Patent: December 6, 2022Assignee: Unimicron Technology Corp.Inventors: Yu-Shen Chen, I-Ta Tsai, Chien-Chih Chen
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Patent number: 11470715Abstract: An embedded component structure includes a circuit board, a chip, and a heat dissipation element. The chip is embedded in the circuit board. The heat dissipation element surrounds the chip. The chip, the circuit board, and the heat dissipation element are electrically connected. The heat dissipation element includes a first part, a second part, and a third part located between the first part and the second part. The first part is in direct contact with a side wall of the chip. The second part is a ground terminal. A method for manufacturing an embedded component structure is also provided.Type: GrantFiled: September 1, 2020Date of Patent: October 11, 2022Assignee: Unimicron Technology Corp.Inventor: Yu-Shen Chen
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Publication number: 20220022317Abstract: An embedded component structure includes a circuit board, an electronic component, a first conductive terminal, and a second conductive terminal. The circuit board includes a first electrical connection layer and a second electrical connection layer. The electronic component is embedded in the circuit board and includes a first contact and a second contact. The first conductive terminal and the second conductive terminal respectively at least cover a part of top surfaces and side walls of the first contact and the second contact, and the first electrical connection layer and the second electrical connection layer are respectively electrically connected to the first contact and the second contact through the first conductive terminal and the second conductive terminal. A method for manufacturing an embedded component structure is also provided.Type: ApplicationFiled: August 19, 2021Publication date: January 20, 2022Applicant: Unimicron Technology Corp.Inventors: Yu-Shen Chen, I-Ta Tsai, Chien-Chih Chen
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Publication number: 20220022311Abstract: An embedded component structure includes a circuit board, a chip, and a heat dissipation element. The chip is embedded in the circuit board. The heat dissipation element surrounds the chip. The chip, the circuit board, and the heat dissipation element are electrically connected. The heat dissipation element includes a first part, a second part, and a third part located between the first part and the second part. The first part is in direct contact with a side wall of the chip. The second part is a ground terminal. A method for manufacturing an embedded component structure is also provided.Type: ApplicationFiled: September 1, 2020Publication date: January 20, 2022Applicant: Unimicron Technology Corp.Inventor: Yu-Shen Chen
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Patent number: 11134567Abstract: An embedded component structure includes a circuit board, an electronic component, a first conductive terminal, and a second conductive terminal. The circuit board includes a first electrical connection layer and a second electrical connection layer. The electronic component is embedded in the circuit board and includes a first contact and a second contact. The first conductive terminal and the second conductive terminal respectively at least cover a part of top surfaces and side walls of the first contact and the second contact, and the first electrical connection layer and the second electrical connection layer are respectively electrically connected to the first contact and the second contact through the first conductive terminal and the second conductive terminal. A method for manufacturing an embedded component structure is also provided.Type: GrantFiled: September 2, 2020Date of Patent: September 28, 2021Assignee: Unimicron Technology Corp.Inventors: Yu-Shen Chen, I-Ta Tsai, Chien-Chih Chen
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Patent number: 8157415Abstract: A method for making a light emitting diode lighting module includes steps of: (a) packaging a plurality of light emitting diode dies respectively on a plurality of die-mounting parts of a metal lead frame to form a plurality of light emitting diodes, respectively; and (b) cutting off supporting parts of the lead frame so as to form a connecting structure through which the light emitting diodes are connected to each other in one of serial, parallel, and serial-and-parallel connecting manners.Type: GrantFiled: March 10, 2009Date of Patent: April 17, 2012Assignee: Bright LED Electronics Corp.Inventors: Ching-Lin Tseng, Yu-Shen Chen, Ming-Li Chang
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Publication number: 20090231849Abstract: A method for making a light emitting diode lighting module includes steps of: (a) packaging a plurality of light emitting diode dies respectively on a plurality of die-mounting parts of a metal lead frame to form a plurality of light emitting diodes, respectively; and (b) cutting off supporting parts of the lead frame so as to form a connecting structure through which the light emitting diodes are connected to each other in one of serial, parallel, and serial-and-parallel connecting manners.Type: ApplicationFiled: March 10, 2009Publication date: September 17, 2009Applicant: Bright Led Electronics Corp.Inventors: Ching-Lin TSENG, Yu-Shen CHEN, Ming-Li CHANG
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Patent number: 6472266Abstract: A new method is provided for the creation of the bit line contact plug. CUB capacitors typically are located adjacent to the bit line contact plug, a parasitic capacitance therefore exists between the CUB and the contact plug. Typical interface between the CUB and the bit line contact plug consists of a dielectric. By creating an air gap that partially replaces the dielectric between the CUB and the bit line contact plug, the dielectric constant of the interface between the bit line and the CUB is reduced, thereby reducing the parasitic coupling between the bit line contact plug and the CUB. This enables the creation of CUB capacitors of increased height, making the CUB and the therewith created DRAM devices better suited for the era of sub-micron device dimensions.Type: GrantFiled: June 18, 2001Date of Patent: October 29, 2002Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Chih-Hsing Yu, Yu-Shen Chen