Patents by Inventor Yu-Sheng Cheng

Yu-Sheng Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250073667
    Abstract: A complex ionic compound includes a carrier, a bridging agent, and an adsorbent. The bridging agent is grafted to the carrier, and the adsorbent is grafted to the bridging agent.
    Type: Application
    Filed: October 22, 2023
    Publication date: March 6, 2025
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Sheng Cheng, Chia-Shan Chang, Yu-lin Li
  • Patent number: 12243472
    Abstract: A light-emitting diode (LED) panel and a driving device therefore is provided. The driving device includes a source driver and a scan driver. The source driver is coupled to a plurality of data lines disposed in the LED panel. The source driver outputs driving currents to the data lines in any one of a plurality of scan line periods, to drive an LED array of the LED panel. The scan driver is coupled to a plurality of scan lines disposed in the LED panel, wherein the scan driver scans the scan lines during the plurality of scan line periods. In an active period of any one of the scan line periods, the scan driver applies an enable voltage to a current scan line among the scan lines, and the scan driver applies a pre-charge voltage to other scan line among the scan lines.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: March 4, 2025
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yu-Sheng Ma, Jhih-Siou Cheng, Chun-Fu Lin, Jin-Yi Lin
  • Publication number: 20250054522
    Abstract: A semiconductor device includes logic circuitry including a transistor disposed over a substrate, multiple layers each including metal wiring layers and an interlayer dielectric layer, respectively, disposed over the logic circuitry, and memory arrays. The multiple layers of metal wiring include, in order closer to the substrate, first, second, third and fourth layers, and the memory arrays include lower multiple layers disposed in the third layer.
    Type: Application
    Filed: October 29, 2024
    Publication date: February 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li CHIANG, Yu-Sheng CHEN, Chao-Ching CHENG, Tzu-Chiang CHEN
  • Patent number: 12211895
    Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers, the second semiconductor layer and an upper portion of the fin structure at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, are etched. A dielectric layer is formed over the etched upper portion of the fin structure. A source/drain epitaxial layer is formed. The source/drain epitaxial layer is connected to ends of the second semiconductor wires, and a bottom of the source/drain epitaxial layer is separated from the fin structure by the dielectric layer.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lin Yang, Chao-Ching Cheng, Tzu-Chiang Chen, I-Sheng Chen
  • Publication number: 20250031365
    Abstract: A memory structure including a substrate, charge storage layers, and a gate is provided. The charge storage layers are located on the substrate. The gate is located on the substrate on one side of the charge storage layers. The gate extends along a first direction. The gate has a protruding portion protruding along a second direction. The second direction intersects the first direction. The protruding portion is located between two adjacent charge storage layers arranged along the first direction.
    Type: Application
    Filed: August 4, 2023
    Publication date: January 23, 2025
    Applicant: United Microelectronics Corp.
    Inventors: Hsin-Chieh Lin, Po-Jui Chiang, Pei Lun Jheng, Chao-Sheng Cheng, Ming-Jen Chang, Ko Chin Chang, Yu Ming Liu
  • Publication number: 20070153092
    Abstract: A video camera apparatus for whole space monitoring is provided, which includes a lens module having a plurality of lenses, a calculation unit, and a processing unit. The lens module captures images from different directions and generates a plurality of image data, then outputs the image data to the calculation unit. The calculation unit calculates the received image data and outputs the image data to the processing unit. The processing unit compresses the image data according to the output of the calculation unit and outputs the compressed image data to the host apparatus.
    Type: Application
    Filed: January 5, 2006
    Publication date: July 5, 2007
    Inventors: Chin-Tien Yang, Yu-Sheng Cheng, Yu-Min Chen, Cheng-Hung Weng, Hung-Jen Chen, Ruei-Shiang Lin, Hui-Shan Chen, Yi-Shiuan Hsu, Sheng-Chia Lee, I-Hao Chan, Yi-Jen Cheng, Chi-Ming Lin, Chan-Sheng Lin