Patents by Inventor Yu-Sheng (Stephen) Yang

Yu-Sheng (Stephen) Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Delay locked loop with harmonic lock and hang prevention architecture
    Patent number: 7209533
    Abstract: The present invention prevents the DLL from locking into the wrong phase, harmonic lock and hang. The detection is independent of temperature, voltage and process that the DLL is running. Including these mechanisms in the DLL design, the operating frequency range of the DLL can be extended significantly. Also many design blocks in the main loop can be reused for these additional circuitries, the design time of this DLL is much faster than to design a whole new hang or harmonic lock prevention circuitries.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 24, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Hai Nguyen, Yu-Sheng (Stephen) Yang, Vuong Le