Patents by Inventor Yu-Sheng Su

Yu-Sheng Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8690596
    Abstract: A jack connector includes a main body, contact terminals, and an engaging assembly. The main body has a lateral opening on its one side surface and a top opening on a top surface connected to the side surface. A portion of the contact terminals are provided in the main body. The engaging assembly is mounted on the top surface of the main body to surround the top opening. The engaging assembly has two engaging plates protruding from the top opening. When a plug is inserted into the jack connector via the lateral opening, the two engaging plates of the jack connector are engaged with the plug, so that the plug can be electrically connected to the jack connector via the contact terminals.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: April 8, 2014
    Assignees: Tyco Electronics Holdings (Bermuda) No. 7 Ltd., Tyco Electronics Corporation
    Inventors: Yu Sheng Su, James R. Kirk
  • Publication number: 20140050973
    Abstract: The present disclosure relates to an electrochemical cell including an anode, a sulfur-containing cathode, a lithium-ion-containing electrolyte, and a porous carbon interlayer disposed between the anode and the cathode. The interlayer may be permeable to the electrolyte. The interlayer may be formed from a multiwall carbon nanotube (MWCNT) or a microporous carbon paper (MCP).
    Type: Application
    Filed: July 31, 2013
    Publication date: February 20, 2014
    Inventors: Arumugam Manthiram, Yu-Sheng Su
  • Publication number: 20130263900
    Abstract: A semiconductor apparatus includes a first tank configured to accommodate a first fluid. A second tank is configured to receive overflow of the first fluid into an upper portion of the second tank and to accommodate a second fluid. A cycling system including a first conduit is configured between the first tank and the second tank. The first conduit has an end substantially below a surface of the second fluid. A fluid providing system including a second conduit is fluidly coupled to the second tank and configured to provide the second fluid into the second tank. The second conduit has an end substantially below the surface of the second fluid. An overflow system is coupled to the second tank and configured to remove an upper portion of the second fluid when the surface of the second fluid is substantially equal to or higher than a pre-determined level.
    Type: Application
    Filed: June 6, 2013
    Publication date: October 10, 2013
    Inventors: Kuang-Nian Tang, Yang- Kai Fan, Yu-Sheng Su, Ming-Tsao Chiang, Yu-Cheng Shih
  • Publication number: 20130164626
    Abstract: The present disclosure includes a sulfur-carbon nanotube composite comprising a sheet of carbon nanotubes and sulfur nucleated upon the carbon nanotubes, and methods for synthesizing the same. In some embodiments, the sulfur-carbon composite may further be binder-free and include a sheet of carbon nanotubes, rendering a binder and a current collector unnecessary. In other embodiments of the present disclosure, a cathode comprising the sulfur-carbon nanotube composite is disclosed. In additional embodiments of the present disclosure, batteries may include the cathodes described herein. Those batteries may achieve high rate capabilities.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Arumugam Manthiram, Yu-Sheng Su
  • Publication number: 20130164625
    Abstract: This disclosure relates to a method of synthesizing a sulfur-carbon composite comprising forming an aqueous solution of a sulfur-based ion and carbon source, adding an acid to the aqueous solution such that the sulfur-based ion nucleates as sulfur upon the surface of the carbon source; and forming an electrically conductive network from the carbon source. The sulfur-carbon composite includes the electrically conductive network with nucleated sulfur. It also relates to a sulfur-carbon composite comprising a carbon-based material, configured such that the carbon-based material creates an electrically conductive network and a plurality of sulfur granules in electrical communication with the electrically conductive network, and configured such that the sulfur granules are reversibly reactive with alkali metal. It further relates to batteries comprising a cathode comprising such a carbon-based material along with an anode and an electrolyte.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Arumugam Manthiram, Yu-Sheng Su
  • Patent number: 8460478
    Abstract: A semiconductor apparatus includes a first tank configured to accommodate a first fluid. A second tank is configured to receive overflow of the first fluid into an upper portion of the second tank and to accommodate a second fluid. A cycling system including a first conduit is configured between the first tank and the second tank. The first conduit has an end substantially below a surface of the second fluid. A fluid providing system including a second conduit is fluidly coupled to the second tank and configured to provide the second fluid into the second tank. The second conduit has an end substantially below the surface of the second fluid. An overflow system is coupled to the second tank and configured to remove an upper portion of the second fluid when the surface of the second fluid is substantially equal to or higher than a pre-determined level.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: June 11, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuang-Nian Tang, Yang-Kai Fan, Yu-Sheng Su, Ming-Tsao Chiang, Yu-Cheng Shih
  • Patent number: 8388362
    Abstract: A stacked card-edge connector is provided for fixing and electrically connecting at least one electronic card to a circuit board. The stacked card-edge connector includes two stackable and interchangeable insulating housings, a pair of first card latches, a pair of second card latches, a pair of fasteners. The pair of first card latches are mounted respectively at the two sides of one insulating housing for fixing and/or holding the at least one electronic card. The pair of second card latches are secured respectively at the two sides of the other insulating housing for fixing and/or holding another electronic card. When two electronic cards are secured respectively by the pair of first and second card latches, disengagement of the electronic card secured by pair of first card latches causes a simultaneous disengagement of the electronic card secured by the pair of second card latches.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: March 5, 2013
    Assignee: Tyco Holdings (Bermuda) No. 7 Limited
    Inventor: Yu Sheng Su
  • Publication number: 20120309220
    Abstract: A jack connector includes a main body, contact terminals, and an engaging assembly. The main body has a lateral opening on its one side surface and a top opening on a top surface connected to the side surface. A portion of the contact terminals are provided in the main body. The engaging assembly is mounted on the top surface of the main body to surround the top opening. The engaging assembly has two engaging plates protruding from the top opening. When a plug is inserted into the jack connector via the lateral opening, the two engaging plates of the jack connector are engaged with the plug, so that the plug can be electrically connected to the jack connector via the contact terminals.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 6, 2012
    Inventors: Yu Sheng Su, James R. Kirk
  • Publication number: 20110263146
    Abstract: A stacked card-edge connector is provided for fixing and electrically connecting at least one electronic card to a circuit board. The stacked card-edge connector includes two stackable and interchangeable insulating housings, a pair of first card latches, a pair of second card latches, a pair of fasteners. The pair of first card latches are mounted respectively at the two sides of one insulating housing for fixing and/or holding the at least one electronic card. The pair of second card latches are secured respectively at the two sides of the other insulating housing for fixing and/or holding another electronic card. When two electronic cards are secured respectively by the pair of first and second card latches, disengagement of the electronic card secured by pair of first card latches causes a simultaneous disengagement of the electronic card secured by the pair of second card latches.
    Type: Application
    Filed: April 27, 2011
    Publication date: October 27, 2011
    Inventor: Yu Sheng Su
  • Publication number: 20110230070
    Abstract: A card connector fixing device secures an insulating body and a casing of a card connector to a circuit board. The card connector fixing device includes an insulating body, a casing, and a disconnecting mechanism. The disconnecting mechanism includes a brace with a fastener hole. The brace is positioned on a lengthwise side of the casing, and an end of the brace includes a fastener hole corresponding to an aperture in the insulating body and the casing.
    Type: Application
    Filed: March 18, 2011
    Publication date: September 22, 2011
    Inventor: Yu Sheng Su
  • Publication number: 20110223767
    Abstract: A method of recycling a control wafer having a low-k dielectric layer deposited thereon involves etching a portion of the low-k dielectric layer using a plasma resulting in a residual film of the low-k dielectric layer and byproduct particulates of carbon on the substrate. The residual dielectric film is removed by wet etching with a low polarization organic solvent that includes HF and a surfactant.
    Type: Application
    Filed: May 24, 2011
    Publication date: September 15, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jin-Lin Liang, Yu-Sheng Su, Tai-Yung Yu, Perre Kao, Pin Chia Su, Li Te Hsu
  • Patent number: 7910014
    Abstract: A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 22, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li Te Hsu, Jin Lin Liang, Shih Cheng Yeh, Pin Chia Su
  • Publication number: 20110062375
    Abstract: An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.
    Type: Application
    Filed: November 23, 2010
    Publication date: March 17, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li-Te Hsu, Jin-Lin Liang, Pin-Chia Su
  • Patent number: 7851374
    Abstract: By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: December 14, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li-Te Hsu, Jin-Lin Liang, Pin-Chia Su
  • Publication number: 20090233447
    Abstract: A method of recycling a control wafer having a dielectric layer deposited thereon involves removing most of the dielectric layer by plasma etching leaving a residual film of the dielectric and then removing the residual dielectric film by a wet etching process. The combination of the dry and wet etching provides effective removal of the dielectric material without damaging the wafer substrate and any residual wet etching byproduct particulate remaining on the wafer substrate is then removed by APM cleaning and scrubbing.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jin-Lin Liang, Yu-Sheng Su, Tai-Yung Yu, Perre Kao, Pin-Chia Su, Li Te Hsu
  • Publication number: 20090111269
    Abstract: By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li-Te Hsu, Jin-Lin Liang, Pin-Chia Su
  • Publication number: 20090087929
    Abstract: A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.
    Type: Application
    Filed: December 21, 2007
    Publication date: April 2, 2009
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yung Yu, Yu-Sheng Su, Li Te Hsu, Jin Lin Liang, Shih Cheng Yeh, Pin Chia Su
  • Publication number: 20080295874
    Abstract: A semiconductor apparatus includes a first tank configured to accommodate a first fluid. A second tank is configured to receive overflow of the first fluid into an upper portion of the second tank and to accommodate a second fluid. A cycling system including a first conduit is configured between the first tank and the second tank. The first conduit has an end substantially below a surface of the second fluid. A fluid providing system including a second conduit is fluidly coupled to the second tank and configured to provide the second fluid into the second tank. The second conduit has an end substantially below the surface of the second fluid. An overflow system is coupled to the second tank and configured to remove an upper portion of the second fluid when the surface of the second fluid is substantially equal to or higher than a pre-determined level.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 4, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuang-Nian Tang, Yang-Kai Fan, Yu-Sheng Su, Ming-Tsao Chiang, Yu-Cheng Shih
  • Patent number: 6808589
    Abstract: A wafer transfer robot for a wafer processing system, such as a wet bench system, and a method for utilizing the robot. The wafer transfer robot can be constructed by a robot arm that is equipped with a plurality of wafer blades each adapted for picking-up and carrying one of a plurality of wafers. The plurality of wafer blades each has a predetermined thickness, a top surface, a bottom surface and a predetermined spacing from adjacent wafer blades. A plurality of sensors, such as optical sensors, capacitance sensors or magnetic sensors, with at least one mounted on the bottom side of one of the plurality of wafer blades for sensing the presence of metal on a wafer carried on an adjacent wafer blade immediately below the one of the plurality of wafer blades.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: October 26, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd
    Inventors: Yu-Sheng Su, Chiang-Jen Peng, Pin-Chia Su, Wen-Lang Wu
  • Publication number: 20030230384
    Abstract: A wafer transfer robot for a wafer processing system, such as a wet bench system, and a method for utilizing the robot. The wafer transfer robot can be constructed by a robot arm that is equipped with a plurality of wafer blades each adapted for picking-up and carrying one of a plurality of wafers. The plurality of wafer blades each has a predetermined thickness, a top surface, a bottom surface and a predetermined spacing from adjacent wafer blades. A plurality of sensors, such as optical sensors, capacitance sensors or magnetic sensors, with at least one mounted on the bottom side of one of the plurality of wafer blades for sensing the presence of metal on a wafer carried on an adjacent wafer blade immediately below the one of the plurality of wafer blades.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 18, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Sheng Su, Chiang-Jen Peng, Pin-Chia Su, Wen-Lang Wu