Patents by Inventor Yu-Shun HSIEH

Yu-Shun HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200395275
    Abstract: A device includes a die paddle and a plurality of leads. The leads surround the die paddle. Each of the leads includes an inner lead portion adjacent to and spaced apart from the die paddle, an outer lead portion opposite to the inner lead portion and a bridge portion between the inner lead portion and the outer lead portion. The inner lead portion has an upper bond section connected to the bridge portion and a lower support section below the upper bond section. A sum of a thickness of the upper bond section and a thickness of the lower support section is greater than a thickness of the bridge portion.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 17, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuang-Hsiung CHEN, Chih-Hung HSU, Mei-Lin HSIEH, Yi-Cheng HSU, Yuan-Chun CHEN, Yu-Shun HSIEH, Ko-Pu WU
  • Patent number: 10855289
    Abstract: An oven controlled crystal oscillator consisting includes a substrate, which includes a substrate, at least one base, a crystal blank, a first cover lid, an IC chip, a heat-insulating adhesive, a heater, and a second cover lid. The top of the base is provided with a cavity, and the top of the base is connected to the substrate through conductive wires without using solder. The crystal blank is mounted in the cavity. The first cover lid seals the cavity. The IC chip is mounted on the bottom of the base. The base is mounted on the substrate through the IC chip and the heat-insulating adhesive, and the IC chip is mounted to the bottom of the base. Alternatively, the IC chip and the base are horizontally arranged. The second cover lid is mounted on the top of the substrate.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: December 1, 2020
    Assignee: TXC Corporation
    Inventors: Wan-Lin Hsieh, Erh-Shuo Hsu, Shao-Po Sun, Sheng-Hsiang Kao, Yu-Shun Yen
  • Patent number: 10797004
    Abstract: A semiconductor device package includes: (1) a lead frame including a connection element and multiple leads; (2) a package body encapsulating the lead frame, wherein the package body includes a lower surface and an upper surface opposite to the lower surface, the package body includes a cavity exposing at least one of the leads; (3) at least one conductive via disposed in the cavity of the package body, electrically connected to the connection element, and exposed from the upper surface of the package body; and (4) a conductive layer disposed on the upper surface of the package body and the conductive via.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: October 6, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-Lun Yang, Yu-Shun Hsieh, Chia Yi Cheng, Hong Jie Chen, Shih Yu Huang
  • Publication number: 20200249514
    Abstract: A liquid crystal display device including a first flexible substrate, a plurality of first spacers, a second flexible substrate, a plurality of second spacers, and a liquid crystal layer is provided. The first spacers are disposed on the first flexible substrate, the second flexible substrate is disposed opposite to the first flexible substrate, the second spacers are disposed on the second flexible substrate, and the liquid crystal layer is disposed between the first flexible substrate and the second flexible substrate.
    Type: Application
    Filed: December 31, 2019
    Publication date: August 6, 2020
    Inventors: Yu-Chih Tseng, Chu-Hong Lai, Kuo-Shun Tsai, Chen-Shuo Hsieh
  • Publication number: 20200076438
    Abstract: An oven controlled crystal oscillator consisting includes a substrate, which includes a substrate, at least one base, a crystal blank, a first cover lid, an IC chip, a heat-insulating adhesive, a heater, and a second cover lid. The top of the base is provided with a cavity, and the top of the base is connected to the substrate through conductive wires without using solder. The crystal blank is mounted in the cavity. The first cover lid seals the cavity. The IC chip is mounted on the bottom of the base. The base is mounted on the substrate through the IC chip and the heat-insulating adhesive, and the IC chip is mounted to the bottom of the base. Alternatively, the IC chip and the base are horizontally arranged. The second cover lid is mounted on the top of the substrate.
    Type: Application
    Filed: November 7, 2019
    Publication date: March 5, 2020
    Inventors: WAN-LIN HSIEH, ERH-SHUO HSU, SHAO-PO SUN, SHENG-HSIANG KAO, YU-SHUN YEN
  • Publication number: 20190279941
    Abstract: A semiconductor device package includes: (1) a lead frame including a connection element and multiple leads; (2) a package body encapsulating the lead frame, wherein the package body includes a lower surface and an upper surface opposite to the lower surface, the package body includes a cavity exposing at least one of the leads; (3) at least one conductive via disposed in the cavity of the package body, electrically connected to the connection element, and exposed from the upper surface of the package body; and (4) a conductive layer disposed on the upper surface of the package body and the conductive via.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 12, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-Lun YANG, Yu-Shun HSIEH, Chia Yi CHENG, Hong Jie CHEN, Shih Yu HUANG
  • Patent number: 10312198
    Abstract: A semiconductor device package includes a lead frame, an electronic component, a package body, at least one conductive via and a conductive layer. The lead frame includes a paddle, a connection element and a plurality of leads. The electronic component is disposed on the paddle. The package body encapsulates the electronic component and the lead frame. The at least one conductive via is disposed in the package body, electrically connected to the connection element, and exposed from the package body. The conductive layer is disposed on the package body and the conductive via.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: June 4, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-Lun Yang, Yu-Shun Hsieh, Chia Yi Cheng, Hong Jie Chen, Shih Yu Huang
  • Publication number: 20190122992
    Abstract: A semiconductor device package includes a lead frame, an electronic component, a package body, at least one conductive via and a conductive layer. The lead frame includes a paddle, a connection element and a plurality of leads. The electronic component is disposed on the paddle. The package body encapsulates the electronic component and the lead frame. The at least one conductive via is disposed in the package body, electrically connected to the connection element, and exposed from the package body. The conductive layer is disposed on the package body and the conductive via.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 25, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-Lun YANG, Yu-Shun HSIEH, Chia Yi CHENG, Hong Jie CHEN, Shih Yu HUANG