Patents by Inventor Yu Su

Yu Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10186594
    Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: January 22, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ting Chiang, Chi-Ju Lee, Chih-Wei Lin, Bo-Yu Su, Yen-Liang Wu, Wen-Tsung Chang, Jui-Ming Yang, I-Fan Chang
  • Publication number: 20190006484
    Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 3, 2019
    Inventors: Yen-Liang Wu, Wen-Tsung Chang, Jui-Ming Yang, I-Fan Chang, Chun-Ting Chiang, Chih-Wei Lin, Bo-Yu Su, Chi-Ju Lee
  • Patent number: 10170573
    Abstract: A semiconductor device includes a substrate, a metal gate on the substrate, and a first inter-layer dielectric (ILD) layer around the metal gate. A top surface of the metal gate is lower than a top surface of the ILD layer thereby forming a recessed region atop the metal gate. A mask layer is disposed in the recessed region. A void is formed in the mask layer within the recessed region. A second ILD layer is disposed on the mask layer and the first ILD layer. A contact hole extends into the second ILD layer and the mask layer. The contact hole exposes the top surface of the metal gate and communicates with the void. A conductive layer is disposed in the contact hole and the void.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: January 1, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ting Chiang, Jie-Ning Yang, Chi-Ju Lee, Chih-Wei Lin, Bo-Yu Su, Yen-Liang Wu, I-Fan Chang, Jui-Ming Yang, Wen-Tsung Chang
  • Publication number: 20180376603
    Abstract: A disclosed electronic device includes a housing having an opening, a roll mounted in the housing, a flexible display wound on the roll and being extendable and retractable through the opening based on a rotation direction of the roll, and a roll guide configured to guide the roll to move in a direction capable of constantly maintaining a proceeding direction of the flexible display toward the opening in the housing, based on a variation in a wound length of the flexible display on the roll.
    Type: Application
    Filed: April 5, 2016
    Publication date: December 27, 2018
    Inventors: Hyung-sun LEE, Yu-su KIM, Toshikazu TAKAYANAGI
  • Patent number: 10165331
    Abstract: According to one exemplary embodiment, a method operable to store video data and/or audio data is adapted to a first peer of a video and audio data system having a plurality of peers, and each peer has a corresponding storage space. In the method, before the first peer has not received a service request of a second peer of the plurality of peers, determines whether the video and audio data received by the first peer is stored in its corresponding storage space with a dynamically adjustable first video and audio storing probability, and extends a time interval of the first peer for storing received video and audio data; and when the first peer receives the service request of the second peer, sets a second video and audio storing probability. Thereby the second peer obtains at least one stored video and audio data from the first peer.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: December 25, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Wen Lo, Yi-Yu Su
  • Publication number: 20180366076
    Abstract: An array substrate includes three first conductive lines, three second conductive lines, and four switches. The three first conductive lines are sequentially and consecutively arranged along a direction, and the three second conductive lines are sequentially and consecutively arranged along another direction and intersect the first conductive lines. The four switches are respectively connected to the corresponding first conductive lines and the corresponding second conductive lines. Two of the switches are connected to the second one of the first conductive lines and are substantially located between two adjacent second conductive lines, and the other two of the switches are not connected to the second one of the first conductive lines and are substantially located between the other two adjacent second conductive lines.
    Type: Application
    Filed: December 1, 2017
    Publication date: December 20, 2018
    Inventors: Yu-Min CHI, Sung-Yu SU
  • Publication number: 20180358448
    Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.
    Type: Application
    Filed: July 4, 2017
    Publication date: December 13, 2018
    Inventors: Chun-Ting Chiang, Chi-Ju Lee, Chih-Wei Lin, Bo-Yu Su, Yen-Liang Wu, Wen-Tsung Chang, Jui-Ming Yang, I-Fan Chang
  • Publication number: 20180358833
    Abstract: A wireless power receiver for wirelessly receiving power from a wireless power transmitter comprises: a power reception circuit receiving electromagnetic waves emitted from the wireless power receiver so as to output power having an alternating current waveform; a rectifier for rectifying the power, having an AC waveform, outputted from the power reception circuit into power having a direct current waveform; a DC/DC converter for converting, into a voltage of a preset level, a voltage of the power having a direct current waveform, the power being rectified by the rectifier; a charger for charging a battery by using the power having a DC waveform, converted from the DC/DC converter; an alternating current ground connected to the power reception circuit and/or the rectifier so as to receive at least a portion of the power having an alternating current waveform; and a direct current ground connected to the DC/DC converter and/or the charger so as to receive at least a portion of the power having a direct current
    Type: Application
    Filed: November 23, 2016
    Publication date: December 13, 2018
    Inventors: Chong-Min LEE, Yu-Su KIM, Hyung-koo CHUNG, Hyo-Seok HAN
  • Publication number: 20180356695
    Abstract: A display device includes a plurality of sub-pixel groups, wherein each of the plurality sub-pixel groups comprises eight sub-pixels disposed in a row direction or in a column direction and the eight sub-pixels comprise two red sub-pixels; two blue sub-pixels; two green sub-pixels; and two sub-pixels of a predetermined color, wherein in each of the plurality of sub-pixel groups, a distance between the red sub-pixels or between the blue sub-pixels is less than a distance between the green sub-pixels or between the sub-pixels of the predetermined color, and the sub-pixels of the predetermined color have a luminance higher than a luminance of the red sub-pixels and the blue sub-pixels.
    Type: Application
    Filed: August 19, 2018
    Publication date: December 13, 2018
    Inventors: Shang-Yu Su, Hsueh-Yen Yang, Feng-Ting Pai
  • Publication number: 20180338618
    Abstract: A resettable pressure bar module includes a pressure bar, a rotation element, and a resetting element. The pressure bar includes an outer tube, an upper sealing element, and a lower sealing element. The upper sealing element and the lower sealing element are disposed in the outer tube and respectively disposed on the opposite two sides of the outer tube. The rotation element is fixed to the outer tube and the lower sealing element through a fixing element. One side of the resetting element includes a first guiding slope and a second guiding slope. The pressure bar passes through the resetting element. The rotation element is configured to rotate to a normal position along the first guiding slope or the second guiding slope.
    Type: Application
    Filed: February 12, 2018
    Publication date: November 29, 2018
    Inventors: Pei-Yao Ni, Chiu-Yu Su, Hsin-Cheng Chen
  • Publication number: 20180336809
    Abstract: A display panel includes: a display region, a plurality of data lines, a de-multiplexing circuit, and an operation switching circuit. The de-multiplexing circuit has a plurality of input terminals coupled to a plurality of data driving signal lines, a plurality of output terminals coupled to the plurality of data lines, and at least one de-multiplexing control terminal coupled to at least one driving control signal. The operation switching circuit is configured to switch a conduction status between the at least one de-multiplexing control terminal of the de-multiplexing circuit and a second control signal line according to a voltage of a first control signal line.
    Type: Application
    Filed: May 16, 2018
    Publication date: November 22, 2018
    Inventors: Peng-Bo XI, Sung-Yu SU
  • Patent number: 10128690
    Abstract: A method and power transmitter for efficiently controlling power transmission to one or more power receivers in a wireless multi-power transmission system are provided. The method includes performing, when a predetermined measurement cycle arrives, a load measurement; comparing a current load measurement value with a previous load measurement value; determining whether the current load measurement value is increased over the previous load measurement value by at least as much as a first predetermined threshold; gradually increasing, when the load measurement value is increased over the previous load measurement value by at least as much as the first threshold, a transmission power value until a request for a subscription to a wireless multi-power transmission network from a power reception target within a predetermined time limit; and stopping, when the request for the subscription is not received before the time limit is exceeded, power transmission to the power reception target.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: November 13, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Kang-Ho Byun, Kyung-Woo Lee, Young-Min Lee, Se-Ho Park, Yu-Su Kim, Sung-Ku Yeo
  • Publication number: 20180284542
    Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.
    Type: Application
    Filed: November 2, 2017
    Publication date: October 4, 2018
    Inventors: Peng-Bo XI, Sung-Yu SU, Chu-Hsuan I
  • Publication number: 20180285170
    Abstract: Subject matter involves using natural language to Web application program interfaces (API), which map natural language commands into API calls, or API commands. This mapping enables an average user with little or no programming expertise to access Web services that use API calls using natural language. An API schema is accessed and using a specialized grammar, with the help of application programmers, canonical commands associated with the API calls are generated. A hierarchical probabilistic distribution may be applied to a semantic mesh associated with the canonical commands to identify elements of the commands that require labeling. The identified elements may be sent to annotators, for labeling with NL phrases. Labeled elements may be applied to the semantic mesh and probabilities, or weights updated. Labeled elements may be mapped to the canonical commands with machine learning to generate a natural language to API interface. Other embodiments are described and claimed.
    Type: Application
    Filed: April 28, 2017
    Publication date: October 4, 2018
    Inventors: Michael Gamon, Mark Encarnacion, Patrick Pantel, Ahmed Hassan Awadallah, Madian Khabsa, Yu Su
  • Publication number: 20180267370
    Abstract: A pixel structure includes first and second gate lines, at least one data line, and a pixel unit. The pixel unit has first and second display areas and includes first and second active devices, a first pixel electrode layer, a common electrode layer, and a second pixel electrode layer. The first and second active devices are electrically connected to the first and second gate lines, respectively. The first pixel electrode layer is electrically connected to the first active device. The common electrode layer is disposed above the first pixel electrode layer and includes first and second portions which are located at the first and second display areas, respectively. The second pixel electrode layer is electrically connected to the second active device, and is located above the first portion of the common electrode layer but not above the second portion, where the second pixel electrode layer has a first slit pattern and the second portion of the common electrode layer has a second slit pattern.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 20, 2018
    Inventors: Kung-Ching Chu, Yu-min Chi, Chen-Feng Fan, Sung-Yu Su
  • Publication number: 20180261147
    Abstract: A display device comprising an active area and a surrounding area is provided. The active area includes a common electrode for receiving a common voltage. The surrounding area is located at a side of the active area, and the surrounding area includes a shielding metal layer and a surrounding circuit. The shielding metal layer is electrically isolated from the common electrode and receives a shielding voltage. The surrounding circuit and a first shielding metal are overlapped in a vertical projection direction, and the common voltage is power-isolated from the shielding voltage.
    Type: Application
    Filed: October 20, 2017
    Publication date: September 13, 2018
    Inventors: Rong-Fu LIN, Kai-Wei Hong, Jie-Chuan Huang, Peng-Bo Xl, Sung-Yu Su
  • Patent number: 10073307
    Abstract: A liquid crystal display panel including first and second substrates, a sub-pixel row, first and second control electrodes is provided. The sub-pixel row is disposed on the first substrate and includes first, second and third sub-pixels arranged in sequence along a first direction, the polarity of the first sub-pixel and the polarity of third sub-pixel are the same, the polarity of the second sub-pixel is different from the polarities of the first and third sub-pixels, each of the first to third sub-pixels has a first region and a second region arranged along a second direction, and includes an electrode having a first slit pattern and a second slit pattern respectively located in the first region and the second region, wherein the extending direction of the first slit pattern is different from that of the second slit pattern, and the extending directions of the first slit patterns of two adjacent electrodes are different.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: September 11, 2018
    Assignee: Au Optronics Corporation
    Inventors: Wan-Heng Chang, Sung-Yu Su
  • Patent number: 10074332
    Abstract: A display panel includes a plurality of scanning lines, a plurality of conductive lines, a plurality of data lines, a first pixel, a second pixel, a third pixel and a fourth pixel. The data lines and the conductive lines are parallel. Each of the conductive lines is electrically coupled to one of the scanning lines, so as to transmit at least one gate pulse. The first pixel and the second pixel are located between a first data line and a first conductive line. The first pixel is electrically coupled to the first data line and a first scanning line. The second pixel is electrically coupled to the first pixel and a second scanning line. The third pixel and the fourth pixel are located between the first data line and a second conductive line. The third pixel is electrically coupled to the first data line and a third scanning line. The fourth pixel is electrically coupled to the third pixel and a fourth scanning line.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: September 11, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yu-Min Chi, Sung-Yu Su
  • Patent number: 10069340
    Abstract: A wireless power receiver for wirelessly receiving power from a wireless power supplier includes a power receiver for receiving wireless power from the wireless power supplier and storing the wireless power for a first time period, a rectifier connected to the power receiver for rectifying the wireless power, a power adjuster connected to the rectifier and an output end, for adjusting a magnitude of the wireless power by enabling the power receiver to store the wireless power for the first time period and delivering the wireless power to the output end for a second time period, and a controller for determining the first and second time periods.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: September 4, 2018
    Assignees: Samsung Electronics Co., Ltd, Korea Advanced Institute of Science and Technology
    Inventors: Sung-Ku Yeo, Gyu-Hyeong Cho, Se-Ki Kim, Yu-Su Kim, Se-Ho Park, Jun-Han Choi
  • Patent number: 10061167
    Abstract: A display device includes a plurality of sub-pixel groups, wherein each of the plurality sub-pixel groups comprises eight sub-pixels disposed in a row direction or in a column direction and the eight sub-pixels comprise two red sub-pixels; two blue sub-pixels; two green sub-pixels; and two sub-pixels of a predetermined color, wherein in each of the plurality of sub-pixel groups, a distance between the red sub-pixels or between the blue sub-pixels is less than a distance between the green sub-pixels or between the sub-pixels of the predetermined color, and the sub-pixels of the predetermined color have a luminance higher than a luminance of the red sub-pixels and the blue sub-pixels.
    Type: Grant
    Filed: May 29, 2016
    Date of Patent: August 28, 2018
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Shang-Yu Su, Hsueh-Yen Yang, Feng-Ting Pai