Patents by Inventor Yu TAO

Yu TAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134107
    Abstract: A light source device includes a light guide plate, an optical adhesive, and a light source element. The light guide plate includes a light guide substrate and an enhancement layer. The light guide substrate has a light incident surface, a first surface, and a second surface. The first surface is opposite to the second surface, and the light incident surface extends between the first surface and the second surface. The enhancement layer is disposed on the light guide substrate. A thickness of the enhancement layer is from 1 micrometer to 25 micrometers and a first refractive index of the light guide substrate is greater than a second refractive index of the enhancement layer. The optical adhesive is interposed between the first surface of the light guide substrate and the optical adhesive. The light source element is disposed beside the light incident surface to emit light toward the light incident surface.
    Type: Application
    Filed: June 26, 2023
    Publication date: April 25, 2024
    Applicant: E Ink Holdings Inc.
    Inventors: Hsin-Tao Huang, Yu-Chuan Wen, Jen-Pin Yu, Ching-Huan Liao, Ya-Chin Chang
  • Patent number: 11966900
    Abstract: A transaction record is created showing a purchase transaction of a customer. A CV profile showing a list of items in the transaction obtained from images is also obtained. The items in the transaction record are compared to items on the list. When there is a discrepancy, an action to take is determined.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: April 23, 2024
    Assignee: Walmart Apollo, LLC
    Inventors: Zhichun Xiao, Lingfeng Zhang, Jon Hammer, Joseph Duffy, Yao Liu, Sicong Fang, Xiang Yao, Pingyuan Wang, Yu Tao, Tianyi Mao, Yutao Tang, Feiyun Zhu, Han Zhang, Chunmei Wang, Pingjian Yu, Muzzammil Afroz, Haining Liu
  • Patent number: 11968832
    Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the disclosed method comprises forming a plurality of dielectric stacks stacked on one another over a substrate to create a multiple-stack staircase structure. Each one of the plurality of dielectric stacks comprises a plurality of dielectric pairs arranged along a direction perpendicular to a top surface of the substrate. The method further comprises forming a filling structure that surrounds the multiple-stack staircase structure, forming a semiconductor channel extending through the multiple-staircase structure, wherein the semiconductor channel comprises unaligned sidewall surfaces, and forming a supporting pillar extending through at least one of the multiple-staircase structure and the filling structure, wherein the supporting pillar comprises aligned sidewall surfaces.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: April 23, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Jun Liu, Zongliang Huo, Li Hong Xiao, Zhenyu Lu, Qian Tao, Yushi Hu, Sizhe Li, Zhao Hui Tang, Yu Ting Zhou, Zhaosong Li
  • Patent number: 11962817
    Abstract: Systems and methods for frequency management, including: an online media service configured to: receive a request for a media item, the request including a recipient identifier; identify a set of candidate media items ranked by a set of matching criteria; a frequency management service configured to: perform a query against a lookup service, where the query includes (i) an entity identifier of at least one candidate media item of the set of candidate media items, and (ii) the recipient identifier; receive a response from the lookup service including a quantity of impressions associated with the entity identifier and the recipient identifier; identify a predefined frequency threshold; determine that the frequency threshold is exceeded and exclude the at least one candidate media item from a result set based on the determination; and provide the result set including an identifier of at least one other candidate media item.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: April 16, 2024
    Assignee: TUBI, INC.
    Inventors: Khaldun Matter Ahmad AlDarabsah, Hailong Geng, Yu Tao Zhao, Yoshihiro Tanaka, Haofei Wang, Mark Alden Rotblat, Jaya Kawale, Chang She, Marios Assiotis, Joseph Gallagher, Chiyu Zhong, Amir Mazaheri
  • Publication number: 20240109337
    Abstract: A label printing and attaching system includes a label printing device and a label attaching device. The label printing device has an ink tape supply mechanism for supplying an ink tape with a label pattern. A label tape supply mechanism of the label printing device is adapted to supply a label tape that includes a carrier tape and blank label paper adhered to the carrier tape. The label printing device further includes a heat transfer machine adapted to heat transfer the label pattern on the ink tape onto the blank label paper of the label tape to obtain a desired label. The label attaching device has a label picker adapted to pick up the label with the printed label pattern from the label tape, and a moving device adapted to move the label picker to place the picked label with the printed label pattern onto a product.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Applicants: Tyco Electronics (Dongguan) Ltd., TE Connectivity Solutions GmbH, Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Zongjie (Jason) Tao, Hongzhou (Andy) Shen, Dandan (Emily) Zhang, Roberto Francisco-Yi Lu, Guoqiang Liu, Ziqiang Xiong, Kai Fu, Xueyun Zhu, Yi Li, Xuyan Yu
  • Patent number: 11946036
    Abstract: The present invention discloses a bacterium and an obtaining method and application thereof. The bacterium has a property of coproducing 1,3-propanediol and D-lactic acid. Further, the bacterium is Klebsiella oxytoca, including Klebsiella oxytoca PDL-5 CCTCC M 2016185. The obtaining method of the bacterium may be to obtain the bacterium by directly screening wild bacteria that satisfy conditions from the environment or performing gene engineering modification to wild bacteria. The present invention has the advantages that the bacteria can coproduce 1,3-propanediol and D-lactic acid through fermentation, the molar conversion rate and the concentration of the two products are very high, the types of byproducts are few, the concentration is low, the product extraction process is simplified, the high-efficiency biological production of 1,3-propanediol and D-lactic acid can be realized, and the industrial application prospect is very great.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 2, 2024
    Assignee: Shanghai Jiao Tong University
    Inventors: Ping Xu, Bo Xin, Fei Tao, Yu Wang, Hongzhi Tang, Cuiqing Ma
  • Patent number: 11946004
    Abstract: An atmospheric-vacuum heat exchange system with a winding-tube heat exchanger, has a first and second heat exchanging group; a primary distillation tower (4) or flash tower; an atmospheric furnace (5); an atmospheric tower (6); a vacuum furnace (7) and a vacuum tower (8); each winding-tube heat exchanger has a shell-pass cylinder (370), a first and second shell-pass connecting tube (371,372), a first and second tube plate (330,340), a plurality of first and second tube box (310,320), a plurality of heat exchange tubes (360) spirally wounded with multiple spiral tube layers; the number of the first and second tube box (310, 320) are respectively N, and each spiral tube layer has N group(s) of the wounded heat exchange tubes (360), N is a natural number greater than or equal to 1. The loss of heat exchanger is reduced.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: April 2, 2024
    Assignee: Zhenhai Petrochemical Jianan Engineering Co., Ltd.
    Inventors: Jianliang Wang, Xianan Zhang, Huili Ma, Xingmiao Hu, Hongliang Ren, Yu Wang, Jiang Tao, Jiaoyue Cui
  • Publication number: 20240104830
    Abstract: A computer-implemented method, system and computer program product for improving accuracy of a vision model. Images of an object with a first set of perspectives are received from a dataset used to train the vision model. A three-dimensional model of the object is then generated using the images of the object from the dataset. Using the three-dimensional model of the object, images of the object with a second set of perspectives are obtained. For example, the second set of perspectives may include different perspectives than the perspectives of the object from the images contained in the dataset. The dataset used to train the vision model may then be augmented with such images of the object with a second set of perspectives. In this manner, the dataset used to train the vision model includes a greater number of perspectives of the object thereby improving the accuracy of the vision model.
    Type: Application
    Filed: September 24, 2022
    Publication date: March 28, 2024
    Inventors: Kun Yan Yin, Xue Ping Liu, Yun Jing Zhao, Fei Wang, Yu Tao Wu, Yue Liu
  • Publication number: 20240095438
    Abstract: A device includes a first cell active area asymmetrically positioned in a first device column between a first barrier line and a second barrier line, a second cell active area asymmetrically positioned in a second device column between the first barrier line and a third barrier line, where the first cell has a first cell length in a first direction perpendicular to the first barrier line which is three times a second cell length in the first direction. The first cell active area and the second cell active area are a first distance from the first barrier line, and the first cell active area is a second distance from the second barrier line, and the second cell active area is the second distance away from the third barrier line.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Tao YANG, Wen-Shen CHOU, Yung-Chow PENG
  • Publication number: 20240089213
    Abstract: The present disclosure relates to priority flow control (PFC) storm detection and processing methods. In one example method, a first network node performs PFC detection on a first port queue of a first port, and determines that a first preset condition is met. The first preset condition includes: detection is performed in N consecutive first time segments, when the detection is performed in each first time segment, a quantity of first PFC frames sent by the first port queue to a second network node is greater than a first threshold, and a quantity of one or more data packets received by the first port queue from the second network node is less than a second threshold. The first PFC frame is used to indicate the second network node to suspend sending all data flows in the first port queue, and N is a positive integer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Peiying TAO, Yu WANG, Heyang LIU, Hewen ZHENG, Jinfeng YAN
  • Publication number: 20240088127
    Abstract: In an integrated circuit, the gates of a first high-threshold transistor and a first low-threshold transistor are connected together, and the gates of a second high-threshold transistor and a second low-threshold transistor are connected together. The drain of the first high-threshold transistor is conductively connected to the source of the first low-threshold transistor, and the drain of the second high-threshold transistor is conductively connected to the source of the second low-threshold transistor. The gates of the first low-threshold transistor and the second low-threshold transistor are conductively connected to the drain of the first low-threshold transistor. The threshold-voltage of the first high-threshold transistor is larger than a threshold-voltage of the first low-threshold transistor. The threshold-voltage of the second high-threshold transistor is larger than a threshold-voltage of the second low-threshold transistor.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Tao YANG, Wen-Shen CHOU, Yung-Chow PENG
  • Publication number: 20240078370
    Abstract: Various techniques are disclosed for automatically generating sub-cells for a non-final layout of an analog integrated circuit. Device specifications and partition information for the analog integrated circuit is received. Based on the device specifications and the partition information, first cut locations for a first set of cuts to be made along a first direction of a non-final layout of the analog integrated circuit and second cut locations for a second set of cuts to be made along a second direction in the non-final layout are determined. The first set of cuts are made in the non-final layout at the cut locations to produce a temporary layout. The second set of cuts are made in the temporary layout at the cut locations to produce a plurality of sub-cells.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Yu-Tao Yang, Bindu Madhavi Kasina
  • Publication number: 20240059503
    Abstract: A pick and place apparatus, adapted for a carrier, includes a housing connected to the carrier, a lifting assembly movably disposed on the housing, and a pick and place assembly movably disposed on the lifting assembly. A movable direction of the pick and place assembly relative to the lifting assembly is perpendicular to a movable direction of the lifting assembly.
    Type: Application
    Filed: November 16, 2022
    Publication date: February 22, 2024
    Inventors: haikang Du, Baichang Cen, Yu Tao, Chunying Zhang, YuCheng Lin
  • Publication number: 20240028810
    Abstract: Techniques for generating one or more non-final layouts for an analog integrated circuit are disclosed. The techniques include generating a non-final layout of an analog integrated circuit based on device specifications, partitioning the non-final layout into a plurality of subcells, merging the verified sub-cells to form a merged layout of the analog integrated circuit, and performing quality control checks on the merged layout. Additionally or alternatively, generating the non-final layout can include determining an allowable spacing between adjacent cells of different cell types or inserting one or more filler cells into a filler zone in the non-final layout.
    Type: Application
    Filed: July 31, 2023
    Publication date: January 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Tao Yang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang
  • Publication number: 20240014136
    Abstract: A semiconductor device includes: first and second active regions (ARs) included correspondingly in abutting first and second analog cell regions, a region where the first and second analog cell regions abut (analog-cell-boundary (ACB) region) extending from about a top boundary of the first AR to about a bottom boundary of the second AR; via-to-PGBM_1st-segment contact structures (VBs) correspondingly being under the first or second ARs, a long axis of each VB and a short axis of each of the first and second ARs having about a same length; and a PG segment in a first buried metallization layer (PGBM_1st segment) under the VBs, the PGBM_1st segment underlapping a majority of each of the VBs, and a Y-midline of the PGBM_1st segment being at or proximal to where the first and second analog cell regions abut and thus being at or proximal to a middle of the ACB region.
    Type: Application
    Filed: January 23, 2023
    Publication date: January 11, 2024
    Inventors: Ming-Cheng SYU, Yu-Tao YANG, Chung-Ting LU, Po-Zeng KANG, Amit KUNDU, Wen-Shen CHOU, Yung-Chow PENG
  • Patent number: 11847399
    Abstract: A device includes a first cell active area asymmetrically positioned in a first device column between a first barrier line and a second barrier line, a second cell active area asymmetrically positioned in a second device column between the first barrier line and a third barrier line, where the first cell has a first cell length in a first direction perpendicular to the first barrier line which is three times a second cell length in the first direction. The first cell active area and the second cell active area are a first distance from the first barrier line, and the first cell active area is a second distance from the second barrier line, and the second cell active area is the second distance away from the third barrier line.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Tao Yang, Wen-Shen Chou, Yung-Chow Peng
  • Publication number: 20230365990
    Abstract: A nucleic acid construct for improving an adeno-associated virus yield, and a construction method therefor. The nucleic acid construct includes: an adeno-associated virus (AAV) element, and a polynucleotide encoding an IE protein. Said AAV element includes a polynucleotide encoding a Cap protein, a polynucleotide encoding a Rep protein, and an AAV cis-regulatory element. The construction method includes integrating an AAV element carrying an exogenous target gene and a polynucleotide that encodes the IE protein into to a baculovirus vector backbone. The obtained recombinant adeno-associated virus (rAAV) has a low empty capsid rate, while the rAAV yield of a single cell and a unit volume culture is increased, the production cost is reduced, and the production is easy to scale up.
    Type: Application
    Filed: September 28, 2021
    Publication date: November 16, 2023
    Applicant: HANGZHOU GENEWAY BIOTECHNOLOGY CO., LTD.
    Inventors: Yu TAO, Haoquan WU, Lingling SU, Ying DANG
  • Patent number: 11816414
    Abstract: Various techniques are disclosed for automatically generating sub-cells for a non-final layout of an analog integrated circuit. Device specifications and partition information for the analog integrated circuit is received. Based on the device specifications and the partition information, first cut locations for a first set of cuts to be made along a first direction of a non-final layout of the analog integrated circuit and second cut locations for a second set of cuts to be made along a second direction in the non-final layout are determined. The first set of cuts are made in the non-final layout at the cut locations to produce a temporary layout. The second set of cuts are made in the temporary layout at the cut locations to produce a plurality of sub-cells.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: November 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd
    Inventors: Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Yu-Tao Yang, Bindu Madhavi Kasina
  • Patent number: 11811152
    Abstract: An antenna device comprising a first antenna, a second antenna and a circuit board. The first antenna includes a first insulating layer, a first signal-feeding line and two first grounding lines. The first signal-feeding line is disposed on a first surface of the first insulating layer. The first grounding lines are disposed on a second surface of the first insulating layer. The second antenna includes a second insulating layer, a second signal-feeding line and two second grounding lines. The second signal-feeding line is disposed on a first surface of the second insulating layer. The second grounding lines are disposed on a second surface of the second insulating layer. The first insulating layer and the second insulating layer intersect at about 90 degrees. The first and second antennas are disposed on a first surface of the circuit board. The first axis and the second axis are adjacent and substantially parallel.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: November 7, 2023
    Assignee: TAOGLAS GROUP HOLDINGS LIMITED
    Inventors: Yu Tao, Yung Sheng Tseng
  • Publication number: 20230337682
    Abstract: The disclosure relates to the field of microbial technology, in particular to a strain of Bacillus velezensis XY40-1, a fermentation method, a fermentation product and its application. The Bacillus velezensis XY40-1 was deposited in the China Center for Type Culture Collection on Mar. 29, 2022, with the deposited number of CCTCC NO: M 2022342, and was isolated from the leaves of pepper in Xiangyan Pepper Base, Changsha City, Hunan Province. The Bacillus velezensis XY40-1 and its fermentation metabolite disclosed by the disclosure have good antagonism against Geotrichum candidum, Neopestalotiopsis formicarum and Curvularia.
    Type: Application
    Filed: February 2, 2023
    Publication date: October 26, 2023
    Inventors: Xin Li, Yu Tao, Jie Chen, Fangjun Tan, Chi Zhou, Xuexiao Zou