Patents by Inventor Yu-Ting Hung
Yu-Ting Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11363899Abstract: A collapsible hanger includes a hook unit, a first hanger body, and a second hanger body. The hook unit has a hook and a pair of pivot shafts. The first hanger body has a pair of first extensions and a pair of first pivot rings, which are pivotally sleeved on the pivot shafts respectively. The second hanger body has a pair of second extensions, a pair of second pivot rings, and at least one stop section. The second pivot rings are pivotally sleeved on the pivot shafts respectively. The stop section is fixed on one of the second pivot rings. When the first and second hanger bodies are at their respective extended positions and the hook is in a top-side space, the stop section and at least one of the first extensions interfere with each other such that the two hanger bodies cannot pivot away from the hook simultaneously.Type: GrantFiled: February 4, 2022Date of Patent: June 21, 2022Inventor: Yu-Ting Hung
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Publication number: 20180003441Abstract: A method for manufacturing a nickel-titanium alloy includes steps of: placing a titanium material on a first bracket, and placing a nickel material on a second bracket; vacuumizing the vacuum confined space of the melting chamber to below a pressure of 10?5 Torr, and lifting up the titanium material placed on the first bracket to a working area of an induction coil; introducing inert gases; starting the induction coil, to make the titanium material in a levitation state and electromagnetically stirred and heated; dropping the first bracket; measuring whether the temperature of the working area of the induction coil reaches a predetermined temperature range; when the first active metal is in the half molten state, dropping the nickel material placed on the second bracket to be added to the titanium material, and obtaining a homogenizing nickel-titanium alloy by means of electromagnetic stirring and heating; and recycling the homogenizing nickel-titanium alloy.Type: ApplicationFiled: November 22, 2016Publication date: January 4, 2018Inventors: Chao-Hsien HUANG, Weng-Sing HWANG, Guan-Ping QI, Chien-Tzu CHENG, Yu-Ting HUNG
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Publication number: 20180002782Abstract: An device for manufacturing an active alloy includes: a melting chamber including: a working pipe surrounded by an induction coil and forming a working area; a chamber base disposed below the working pipe and communicated with the working pipe, and including: a gas inlet hole; a vacuum pump connection port; and a vacuum sensor, for measuring a vacuum degree in the working pipe; a chamber door communicated with the chamber base; a first bracket passing through the chamber base, and moving towards a direction away from or near the working area; a second bracket extending into the working pipe, and moving towards a direction away from or near the working area; and a material recycling seat which can extend into the chamber base in a push and pull way.Type: ApplicationFiled: November 22, 2016Publication date: January 4, 2018Inventors: Chao-Hsien HUANG, Weng-Sing HWANG, Guan-Ping QI, Chien-Tzu CHENG, Yu-Ting HUNG
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Patent number: 9711358Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.Type: GrantFiled: January 5, 2017Date of Patent: July 18, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
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Patent number: 9653345Abstract: A method of fabricating a semiconductor structure for improving critical dimension control is provided in the present invention. The method includes the following steps. An inter metal dielectric (IMD) layer is formed on a semiconductor substrate, a patterned hard mask layer is formed on the IMD layer, and a first aperture is formed in the IMD layer. A first barrier layer is formed on the patterned hard mask layer and a surface of the first aperture, a first patterned resist is formed on the first barrier layer, and an etching process is performed to form a second aperture in the IMD layer by using the first patterned resist as a mask. The first patterned resist is kept from being poisoned because of the first barrier layer, and the critical dimension control of the semiconductor structure may be improved accordingly.Type: GrantFiled: January 7, 2016Date of Patent: May 16, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shang-Nan Chou, Che-Yi Lin, En-Chiuan Liou, Yu-Ting Hung, Shin-Feng Su, Chia-Hsun Tseng
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Publication number: 20170117149Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.Type: ApplicationFiled: January 5, 2017Publication date: April 27, 2017Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
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Patent number: 9583343Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.Type: GrantFiled: June 29, 2015Date of Patent: February 28, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
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Publication number: 20170025286Abstract: A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.Type: ApplicationFiled: July 26, 2015Publication date: January 26, 2017Inventors: Yu-Te Chen, Chia-Hsun Tseng, En-Chiuan Liou, Chiung-Lin Hsu, Meng-Lin Tsai, Jan-Fu Yang, Yu-Ting Hung, Shin-Feng Su
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Patent number: 9548216Abstract: A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.Type: GrantFiled: July 26, 2015Date of Patent: January 17, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yu-Te Chen, Chia-Hsun Tseng, En-Chiuan Liou, Chiung-Lin Hsu, Meng-Lin Tsai, Jan-Fu Yang, Yu-Ting Hung, Shin-Feng Su
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Patent number: 9543203Abstract: A method of fabricating a semiconductor structure includes the following steps: forming a first interlayer dielectric on a substrate; forming a gate electrode on the substrate so that the periphery of the gate electrode is surrounded by the first interlayer dielectric; forming a patterned mask layer comprising at least a layer of organic material on the gate electrode; forming a conformal dielectric layer to conformally cover the layer of organic material; and forming a second interlayer dielectric to cover the conformal dielectric layer.Type: GrantFiled: July 2, 2015Date of Patent: January 10, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, En-Chiuan Liou, Chia-Hsun Tseng, Wei-Hao Huang, Yu-Ting Hung
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Publication number: 20170004997Abstract: A method of fabricating a semiconductor structure includes the following steps: forming a first interlayer dielectric on a substrate; forming a gate electrode on the substrate so that the periphery of the gate electrode is surrounded by the first interlayer dielectric; forming a patterned mask layer comprising at least a layer of organic material on the gate electrode; forming a conformal dielectric layer to conformally cover the layer of organic material; and forming a second interlayer dielectric to cover the conformal dielectric layer.Type: ApplicationFiled: July 2, 2015Publication date: January 5, 2017Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, En-Chiuan Liou, Chia-Hsun Tseng, Wei-Hao Huang, Yu-Ting Hung
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Publication number: 20160343567Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.Type: ApplicationFiled: June 29, 2015Publication date: November 24, 2016Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
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Patent number: 7563732Abstract: A method and an apparatus for forming a polycrystalline layer using laser annealing for preventing damage to the peripheral region of the substrate during laser annealing. The laser annealing comprises a shadow mask structure. When crystallizing an amorphous layer by laser annealing, the shadow mask structure shields the peripheral region of the amorphous layer from laser irradiation. A method for forming a polycrystalline layer using the laser annealing apparatus is also provided in the invention.Type: GrantFiled: November 12, 2004Date of Patent: July 21, 2009Assignee: TPO Displays Corp.Inventors: Shih-Chang Chang, Yaw-Ming Tsai, Ryan Lee, Yu-Ting Hung
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Publication number: 20050233224Abstract: A method of improving a polysilicon film crystallinity in a sequential lateral solidification process is provided. A mask having a main pattern portion and a compensating pattern portion is provided. The main pattern portion defines a laser beam pattern scanning and transforming an amorphous silicon film into a polysilicon film. The compensating pattern portion adjacent to the main pattern portion adjusts the energy of the laser beam injected to the polysilicon film to improve the grain shape thereof.Type: ApplicationFiled: September 15, 2004Publication date: October 20, 2005Inventors: Chang-Ho Tseng, Shih-Chang Chang, Yaw-Ming Tsai, Yu-Ting Hung, Ryan Lee
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Publication number: 20050148208Abstract: A method and an apparatus for forming a polycrystalline layer using laser annealing for preventing damage to the peripheral region of the substrate during laser annealing. The laser annealing comprises a shadow mask structure. When crystallizing an amorphous layer by laser annealing, the shadow mask structure shields the peripheral region of the amorphous layer from laser irradiation. A method for forming a polycrystalline layer using the laser annealing apparatus is also provided in the invention.Type: ApplicationFiled: November 12, 2004Publication date: July 7, 2005Inventors: Shih-Chang Chang, Yaw-Ming Tsai, Ryan Lee, Yu-Ting Hung
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Publication number: 20040165141Abstract: A method of forming a liquid crystal panel is provided. A first substrate and a second substrate are provided. A sealant having an injection opening is formed between the first substrate and the second substrate. The sealant is fabricated using an etchant resistant material. Thereafter, liquid crystals are injected into the cavity bounded by the first substrate, the second substrate and the sealant through the injection opening. After sealing the injection opening, a substrate thickness reduction process is performed to reduce the thickness of the first substrate and the second substrate.Type: ApplicationFiled: May 7, 2003Publication date: August 26, 2004Inventors: Hsin-Ming Chen, Cheng-Hsun Tsai, Yu-Ting Hung, Ching-Yang Chang, Shih-Chang Chang, Yaw-Ming Tsai
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Patent number: D875037Type: GrantFiled: January 3, 2018Date of Patent: February 11, 2020Assignee: Merry Electronics (Shenzhen) Co., Ltd.Inventors: Yu-Ting Hung, Chung-Yi Huang
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Patent number: D877063Type: GrantFiled: January 3, 2018Date of Patent: March 3, 2020Assignee: Merry Electronics (Shenzhen) Co., Ltd.Inventors: Yu-Ting Hung, Chung-Yi Huang
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Patent number: D884599Type: GrantFiled: January 3, 2018Date of Patent: May 19, 2020Assignee: Merry Electronics (Shenzhen) Co., Ltd.Inventors: Yu-Ting Hung, Chung-Yi Huang
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Patent number: D886047Type: GrantFiled: January 3, 2018Date of Patent: June 2, 2020Assignee: Merry Electronics(Shenzhen) Co., Ltd.Inventors: Yu-Ting Hung, Chung-Yi Huang