Patents by Inventor YU TING YANG

YU TING YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Publication number: 20240136183
    Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240067746
    Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.
    Type: Application
    Filed: February 28, 2023
    Publication date: February 29, 2024
    Inventors: Tong-Hsuan CHANG, Mei-Chun YANG, Liahng-Yirn LIU, Jerry TING, Shu-Yen CHANG, Yen-Ying CHEN, Yu-Yu LIN, Shu-Lun TANG
  • Patent number: 11913981
    Abstract: An electrostatic sensing system configured to sense an electrostatic information of a fluid inside a fluid distribution component and including an electrostatic sensing assembly, a signal amplifier and an analog-to-digital converter. The electrostatic sensing assembly includes a sensing component, and a shield. The sensing component is configured to be disposed at the fluid distribution component. The sensing component is disposed through the fluid distribution component so as to be partially located in the fluid distribution component. The shield surrounds a part of the sensing component that is located in the fluid distribution component. At least part of the shield is located on an upstream side of the sensing component. The signal amplifier is electrically connected to the sensing component. The analog-to-digital converter is electrically connected to the signal amplifier. The shield has an opening spaced apart from the sensing component.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: February 27, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Mean-Jue Tung, Ming-Da Yang, Shi-Yuan Tong, Yu-Ting Huang, Chun-Pin Wu
  • Patent number: 11116146
    Abstract: A cultivation assembly has a container, at least one first engaging structure facing outside of the container, and an engaging member. The engaging member is configured to connect the container of another cultivation assembly side by side. The engaging member has two second engaging structures facing opposite directions. Each one of the two second engaging structures is capable of engaging with one of the at least one first engaging structure. The container of the cultivation assembly is capable of being connected to the container of another cultivation assembly side by side via the engaging member and without wasting a lot of labor to move the container.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: September 14, 2021
    Assignee: T.U.I. INDUSTRIAL CO., LTD.
    Inventor: Yu-Ting Yang
  • Publication number: 20210029976
    Abstract: A cultivation assembly has a container, at least one first engaging structure facing outside of the container, and an engaging member. The engaging member is configured to connect the container of another cultivation assembly side by side. The engaging member has two second engaging structures facing opposite directions. Each one of the two second engaging structures is capable of engaging with one of the at least one first engaging structure. The container of the cultivation assembly is capable of being connected to the container of another cultivation assembly side by side via the engaging member and without wasting a lot of labor to move the container.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Inventor: Yu-Ting Yang
  • Patent number: 9307676
    Abstract: A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: April 5, 2016
    Assignee: CHIPMOS TECHNOLOGIES INC.
    Inventors: Tzu Hsin Huang, Yu Ting Yang, Hung Hsin Liu, An Hong Liu, Geng Shin Shen, David Wei Wang, Shih Fu Lee
  • Publication number: 20130294033
    Abstract: A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.
    Type: Application
    Filed: July 5, 2013
    Publication date: November 7, 2013
    Inventors: TZU HSIN HUANG, YU TING YANG, HUNG HSIN LIU, AN HONG LIU, GENG SHIN SHEN, DAVID WEI WANG, SHIH FU LEE
  • Patent number: 8564954
    Abstract: A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: October 22, 2013
    Assignee: Chipmos Technologies Inc.
    Inventors: Tzu Hsin Huang, Yu Ting Yang, Hung Hsin Liu, An Hong Liu, Geng Shin Shen, Wei David Wang, Shih Fu Lee
  • Publication number: 20110304991
    Abstract: A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.
    Type: Application
    Filed: November 18, 2010
    Publication date: December 15, 2011
    Applicant: CHIPMOS TECHNOLOGIES INC.
    Inventors: TZU HSIN HUANG, YU TING YANG, HUNG HSIN LIU, AN HONG LIU, GENG SHIN SHEN, DAVID WEI WANG, SHIH FU LEE