Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The method includes removing a first semiconductor layer disposed between a second semiconductor layer and a third semiconductor layer and performing an oxide refill process to form a seamless dielectric material between the second and third semiconductor layers. The oxide refill process includes exposing the second and third semiconductor layers to a silicon-containing precursor at a first flow rate for a first duration to form a monolayer, and exposing the monolayer to an oxygen-containing precursor at a second flow rate for a second duration to form the seamless dielectric material, the second flow rate is about twice to about 20 times the first flow rate, and the second duration is about twice to about 20 times the first duration.

Abstract: A wire stripper has a first handle, a second handle, a blade set, a spring, and a pair of support blocker plates. The second handle is pivoted to the first handle by a pivot. The blade set has a first blade and a second blade, which are connected to the first handle and the second handle respectively. The blade set is fixed with the first handle or the second handle by a screw. Two ends of the spring are respectively fixed on the first handle and the second handle. An end of each of the support blocker plates is connected to the first handle, and another end thereof is extended to the second handle. The disclosure can provide support to a cutting process and the blade set can be replaced when being worn down.

Abstract: A semiconductor device includes a substrate, a dummy gate structure, and a gate structure. The substrate has a dummy gate trench and a gate trench, and includes a first well region, a second well region and a source region. The first well region is formed by doping at least one element from a first element group, and has a first conductive channel. The second well region is formed by doping at least one element from a second element group, the second well region is on the first well region and has a second conductive channel, a polarity of the second conductive channel is opposite to that of the first conductive channel. The dummy gate structure is in the dummy gate trench of the substrate, and a portion of the dummy gate structure is in the first well region. The gate structure is between the adjacent dummy gate structures.

Abstract: A power semiconductor device includes a semiconductor substrate, a drift layer, a well region, a doped region, two dummy trenches, a gate structure and a dielectric layer. The semiconductor substrate is doped to have a first conductive channel. The drift layer on the semiconductor substrate is doped to have the first conductive channel. The well region on the drift layer is doped to have a second conductive channel having a polarity opposite to that of the first conductive channel. The doped region on the well region is doped to have the first conductive channel. Two dummy trenches pass through the doped region and the well region. Each of the dummy trenches has a dummy gate. The gate structure has a real gate and is between the dummy trenches. The dielectric layer isolates the dummy gate and the real gate from the doped region, the well region and the drift layer.

Abstract: Optical devices and methods of manufacture are presented in which a first mask is utilized for multiple purposes. Some methods include depositing a first mask over a support material, forming a concave surface in the support material through the first mask, and bonding the first mask to a first bonding layer over an optical interposer.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A stripping tool includes a fixed handle (10), a fixed clamp plate (20), a movable handle (30), a movable clamp plate (40), a cutting/pulling mechanism (50) and a driving operation mechanism (60). The driving operation mechanism (60) includes a pushing assembly (61), a pressing assembly (62) and an action member (63). One end of the pushing assembly (61) is connected to the moveable handle (30) and another end is moveably connected to the action member (63). The pressing assembly (62) is fixed to the fixed handle (10). One end of the action member (63) is connected to the cutting/pulling mechanism (50) and another end is elastically pressed by the pressing assembly (62). When the movable handle (30) rotates toward the fixed handle (10), the pushing assembly (61) moves the action member (63) and the cutting/pulling mechanism (50) toward the pressing assembly (62) to implement wire stripping.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A pliers includes a first pliers body (10) and a second pliers body (20). The first pliers body includes a first handle (11) and a first clamp (12). A first pliers knife (13) and a first pliers back (14) are disposed on the first clamp (12). The second pliers body (20) includes a second handle (21) and a second clamp (22). A second pliers knife (23) and a second pliers back (24) are disposed on the second clamp (22). The second clamp (22) is pivotally connected with the first clamp (12) to clamp or cut. The first pliers back (14) or the second pliers back (24) is provided with a chipping blade (50) configured in a concave arc shape for chipping.

Abstract: A pliers includes a first pliers body (10) and a second pliers body (20). The first pliers body includes a first handle (11) and a first clamp (12). A first pliers knife (13) and a first pliers back (14) are disposed on the first clamp (12). The second pliers body (20) includes a second handle (21) and a second clamp (22). A second pliers knife (23) and a second pliers back (24) are disposed on the second clamp (22). The second clamp (22) is pivotally connected with the first clamp (12) to clamp or cut. The first pliers back (14) or the second pliers back (24) is provided with a chipping blade (50) configured in a concave arc shape for chipping.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A crimping tool includes a base, a press handle, a slide module, a link and a fixed fix shaft. The base has two first side walls and to sliding space is defined therebetween. One end of the press handle is pivoted at an end of the base. The slide module is slidably accommodated in the sliding space and has a guiding groove. Two ends of the link are pivoted at the press handle and the slide module separately. The fix shaft is disposed across the two first side walls and inserted in the guiding groove. When the press handle drives the slide module sliding in the sliding space through the link, the guiding groove of the slide module will be guided and restricted by the fix shaft. Therefore, the guiding grooves will not be damaged and get dirt.

Abstract: A defect inspection method and a defect inspection system for a solar cell are proposed, where the method includes the following steps. Output voltages and output currents of the solar cell are measured by a measuring device. A stepwise current-voltage curve (stepwise IV curve) and a fitted current-voltage curve (fitted IV curve) are generated by a processing device according to the output voltages and the output currents, and whether a first error of the fitted IV curve is less than a first error tolerance is determined by the processing device. When the first error is not less than the first error tolerance, whether there exists at least one surge in steps of the stepwise IV curve is determined by the processing device so as to determine whether the solar cell has a defect. Next, a determined result of the processing device is outputted by the output device.

Abstract: A crimping tool includes a base, a press handle, a slide module, a link and a fixed fix shaft. The base has two first side walls and to sliding space is defined therebetween. One end of the press handle is pivoted at an end of the base. The slide module is slidably accommodated in the sliding space and has a guiding groove. Two ends of the link are pivoted at the press handle and the slide module separately. The fix shaft is disposed across the two first side walls and inserted in the guiding groove. When the press handle drives the slide module sliding in the sliding space through the link, the guiding groove of the slide module will be guided and restricted by the fix shaft. Therefore, the guiding grooves will not be damaged and get dirt.

Abstract: A defect inspection method and a defect inspection system for a solar cell are proposed, where the method includes the following steps. Output voltages and output currents of the solar cell are measured by a measuring device. A stepwise current-voltage curve (stepwise IV curve) and a fitted current-voltage curve (fitted IV curve) are generated by a processing device according to the output voltages and the output currents, and whether a first error of the fitted IV curve is less than a first error tolerance is determined by the processing device. When the first error s not less than the first error tolerance, whether there exists at least one surge in steps of the stepwise IV curve is determined by the processing device so as to determine whether the solar cell has a defect. Next, a determined result of the processing device is outputted by the output device.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.