Abstract: The present disclosure describes a semiconductor structure having bonded wafers with storage layers and a method to bond wafers with storage layers. The semiconductor structure includes a first wafer including a first storage layer with carbon, a second wafer including a second storage layer with carbon, and a bonding layer interposed between the first and second wafers and in contact with the first and second storage layers.

Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.

Abstract: A pliers includes a first pliers body (10) and a second pliers body (20). The first pliers body includes a first handle (11) and a first clamp (12). A first pliers knife (13) and a first pliers back (14) are disposed on the first clamp (12). The second pliers body (20) includes a second handle (21) and a second clamp (22). A second pliers knife (23) and a second pliers back (24) are disposed on the second clamp (22). The second clamp (22) is pivotally connected with the first clamp (12) to clamp or cut. The first pliers back (14) or the second pliers back (24) is provided with a chipping blade (50) configured in a concave arc shape for chipping.

Abstract: A pliers includes a first pliers body (10) and a second pliers body (20). The first pliers body includes a first handle (11) and a first clamp (12). A first pliers knife (13) and a first pliers back (14) are disposed on the first clamp (12). The second pliers body (20) includes a second handle (21) and a second clamp (22). A second pliers knife (23) and a second pliers back (24) are disposed on the second clamp (22). The second clamp (22) is pivotally connected with the first clamp (12) to clamp or cut. The first pliers back (14) or the second pliers back (24) is provided with a chipping blade (50) configured in a concave arc shape for chipping.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A crimping tool includes a base, a press handle, a slide module, a link and a fixed fix shaft. The base has two first side walls and to sliding space is defined therebetween. One end of the press handle is pivoted at an end of the base. The slide module is slidably accommodated in the sliding space and has a guiding groove. Two ends of the link are pivoted at the press handle and the slide module separately. The fix shaft is disposed across the two first side walls and inserted in the guiding groove. When the press handle drives the slide module sliding in the sliding space through the link, the guiding groove of the slide module will be guided and restricted by the fix shaft. Therefore, the guiding grooves will not be damaged and get dirt.

Abstract: A defect inspection method and a defect inspection system for a solar cell are proposed, where the method includes the following steps. Output voltages and output currents of the solar cell are measured by a measuring device. A stepwise current-voltage curve (stepwise IV curve) and a fitted current-voltage curve (fitted IV curve) are generated by a processing device according to the output voltages and the output currents, and whether a first error of the fitted IV curve is less than a first error tolerance is determined by the processing device. When the first error is not less than the first error tolerance, whether there exists at least one surge in steps of the stepwise IV curve is determined by the processing device so as to determine whether the solar cell has a defect. Next, a determined result of the processing device is outputted by the output device.

Abstract: A crimping tool includes a base, a press handle, a slide module, a link and a fixed fix shaft. The base has two first side walls and to sliding space is defined therebetween. One end of the press handle is pivoted at an end of the base. The slide module is slidably accommodated in the sliding space and has a guiding groove. Two ends of the link are pivoted at the press handle and the slide module separately. The fix shaft is disposed across the two first side walls and inserted in the guiding groove. When the press handle drives the slide module sliding in the sliding space through the link, the guiding groove of the slide module will be guided and restricted by the fix shaft. Therefore, the guiding grooves will not be damaged and get dirt.

Abstract: A defect inspection method and a defect inspection system for a solar cell are proposed, where the method includes the following steps. Output voltages and output currents of the solar cell are measured by a measuring device. A stepwise current-voltage curve (stepwise IV curve) and a fitted current-voltage curve (fitted IV curve) are generated by a processing device according to the output voltages and the output currents, and whether a first error of the fitted IV curve is less than a first error tolerance is determined by the processing device. When the first error s not less than the first error tolerance, whether there exists at least one surge in steps of the stepwise IV curve is determined by the processing device so as to determine whether the solar cell has a defect. Next, a determined result of the processing device is outputted by the output device.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A method of transferring a thin film includes: providing a first element structure, wherein the first element structure includes a first substrate and a functional film layer formed on the first substrate; completely removing the first substrate, wherein steps of the completely removing the first substrate includes: conducting an etching step to erode the first substrate, and conducting a grinding step to planarize the eroded first substrate; and after completely removing the first substrate, attaching the functional film layer on a second substrate to form a second element structure.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: A planarization method includes at least two steps. One of the steps is to implant at least one impurity into a wafer to form a polish stop layer in the wafer. The other one of the steps is to polish a top surface of the wafer until reaching the polish stop layer.

Abstract: A method of transferring a thin film includes: providing a first element structure, wherein the first element structure includes a first substrate and a functional film layer formed on the first substrate; completely removing the first substrate, wherein steps of the completely removing the first substrate includes: conducting an etching step to erode the first substrate, and conducting a grinding step to planarize the eroded first substrate; and after completely removing the first substrate, attaching the functional film layer on a second substrate to form a second element structure.

Abstract: In a Surface-Enhanced Raman Scattering (SERS) substrate and the manufacturing method thereof, the SERS substrate includes a low thermal conductivity base and a plurality of metal nanoparticles (NPs). The surface of the low thermal conductivity substrate has a first surface, and the first surface has a plurality of ripple micro/nano structures. The plurality of metal NPs are non-continuously densely arranged on the ripple micro/nano structures of the first surface. The metal NPs have a height difference along the ripple micro/nano structures, and form a 3D electric field enhanced region. The manufacturing methods includes sputtering a metal nano-thin film on a surface of a low thermal conductivity base, and the surface of the low thermal conductivity base has a plurality of ripple micro/nano structures; using laser to ablate the metal nano-thin film; and forming a plurality of metal NPs, which are non-continuously densely arranged.

Abstract: The present disclosure relates to a wafer cleaning module for post CMP processes that reduces defects (e.g., watermarks, deposited particles) on a substrate, and an associated method. In some embodiments, the wafer cleaning module has a cleaning tank that may receive a semiconductor substrate within a cleaning medium. A pusher is may vertically move the semiconductor substrate from a starting position within the cleaning tank to an ending position. A position sensor may determine a position of the semiconductor substrate relative to a meniscus of the cleaning medium. Based upon the determined position, a control unit is may adjust a location of the starting position to a predetermined distance below the meniscus.