Abstract: A method of manufacturing a semiconductor device includes forming a fin structure including a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, forming an isolation insulating layer so that the hard mask layer and the stacked layer are exposed from the isolation insulating layer, forming a sacrificial cladding layer over at least sidewalls of the exposed hard mask layer and stacked layer, forming layers of a first dielectric layer and an insertion layer over the sacrificial cladding layer and the fin structure, performing an annealing operation to convert a portion of the layers of the first dielectric layer and the insertion layer from an amorphous form to a crystalline form, and removing the remaining amorphous portion of the layers of the first dielectric layer and the insertion layer to form a recess.

Abstract: The invention introduces a method for garbage collection (GC) in a flash memory device, performed by a processing unit, includes: finding a source block (SBLK) associated with a hit accumulated valid page count (VPC) that is the first one exceeding a total number of physical pages in one destination block (DBLK); labeling the found SBLK and its subsequent SBLKs as first-type SBLKs; labeling the other SBLKs as second-type SBLKs; obtaining Host-address To Flash-address mapping (H2F) sub-tables corresponding to valid pages stored in the second-type SBLKs; in the scanning for each H2F sub-table, detecting valid pages stored in the first-type and the second-type SBLKs, and appending records into a GC table for the valid pages; and reprogramming user data of a designated physical page in a designated first-type or second-type SBLK into a designated physical page in the DBLK according to each record in the GC table.

Abstract: A method for manufacturing a touch film is provided, applicable to a glass thermal transfer device including a conveying apparatus, an unwinding apparatus, and a thermal transfer roller set. The method includes arranging a plurality of glass substrates in a preset gap on the conveying apparatus; arranging a transfer film on the unwinding apparatus, where the transfer film includes a substrate film, a release layer, a color layer, and a surface layer; sequentially conveying the glass substrates to a thermal transfer position by using the conveying apparatus; and continuously guiding the transfer film to the thermal transfer position by using the thermal transfer roller set and pressing the transfer film onto the glass substrate, to cause the surface layer and the color layer to be transferred to the glass substrates in a segmented manner according to a position of the preset gap, to form a plurality of touch films.

Abstract: An optical imaging lens assembly includes at least one optical lens element. The optical lens element includes an anti-reflective coating, and the anti-reflective coating is arranged on at least one surface of the optical lens element. The anti-reflective coating includes a high-low refractive coating and a gradient refractive coating, and the high-low refractive coating is arranged between the optical lens element and the gradient refractive coating. The high-low refractive coating includes at least one high refractive coating layer and at least one low refractive coating layer, which are stacked in alternations. The low refractive coating layer is in contact with the optical lens element. The gradient refractive coating includes a plurality of holes, and the holes away from the optical lens element are relatively larger than the holes close to the optical lens element.

Abstract: A semiconductor device includes a substrate, an isolation structure on the substrate, a fin protruding from the substrate and through the isolation structure, a gate stack engaging the fin, and a gate spacer on sidewalls of the gate stack. The gate spacer includes an inner sidewall facing the gate stack and an outer sidewall opposing the inner sidewall. The inner sidewall has a first height measured from a top surface of the fin and a bowed structure in a top portion of the inner sidewall. The bowed structure extends towards the gate stack for a first lateral distance measured from a middle point of the inner sidewall. The first lateral distance is less than about 8% of the first height.

Abstract: An embedded memory device includes a substrate having an embedded memory region thereon; a first dielectric layer disposed on the substrate within the embedded memory region; conductive vias embedded in the first dielectric layer; data storage structures respectively disposed on the conductive vias; and spacers respectively surrounding the data storage structures over the first dielectric layer. An outer surface of the spacers and a top surface of the first dielectric layer between the spacers constitute a recessed region. A metal-insulator-metal (MIM) capacitor structure is disposed within the recessed region.

Abstract: A metal-insulator-metal (MIM) capacitor structure includes a substrate having a conductor region thereon; and a plurality of independent capacitor units directly disposed on the conductor region. Each of the plurality of independent capacitor units includes a first capacitor electrode wrapped around by a capacitor dielectric layer, and a second capacitor electrode surrounding the capacitor dielectric layer and the first capacitor electrode.

Abstract: An imaging lens assembly includes an optical element and an anti-reflecting film. An imaging light passes through the optical element, and the optical element has a gate trace. The anti-reflecting film is disposed on at least portion of a surface of the optical element, and includes a nanostructure layer and an intermediate layer. The nanostructure layer includes a plurality of ridge-like protrusions extending non-directionally. The intermediate layer is disposed between the optical element and the nanostructure layer, and includes at least two first medium layers and at least one second medium layer, wherein a refractive index of the at least one second medium layer is different from a refractive index of each of the at least two first medium layers, and the at least one second medium layer is disposed between the at least two first medium layers.

Abstract: An optical lens assembly includes at least four optical lens elements. The at least four optical lens elements include, in order from an object side of the optical lens assembly to an image side thereof, a first optical lens element, a second optical lens element, a third optical lens element and a fourth optical lens element. The at least four optical lens elements include a blue-glass lens element, and a specific condition of a fifth arranging factor of the blue-glass lens element is satisfied.

Abstract: A semiconductor apparatus for pre-wetting a semiconductor workpiece includes a process chamber, a workpiece holder disposed within the process chamber to hold the semiconductor workpiece, a pre-wetting fluid tank disposed outside the process chamber and containing a pre-wetting fluid, and a conduit coupled to the pre-wetting fluid tank and extending into the process chamber. The conduit delivers the pre-wetting fluid from the pre-wetting fluid tank out through an outlet of the conduit to wet a major surface of the semiconductor workpiece, wherein the outlet of the conduit is positioned above the major surface of the semiconductor workpiece by a vertical distance.

Abstract: A calabash-shaped MIM capacitor structure includes a stacked layer. The stacked layer includes numerous dielectric layers. An MIM capacitor is disposed within the stacked layer. The MIM capacitor includes a calabash-shaped profile. The calabash-shaped profile includes a rounded bottom, a narrow body and a rounded shoulder disposed from bottom to top.

Abstract: An imaging optical lens system includes five lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The second lens element has an image-side surface being concave in a paraxial region thereof. The third lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The fourth lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof.

Abstract: A method of manufacturing a semiconductor device includes at least the following steps. An opening is formed in a substrate. A first protection layer is formed on an exposed surface of the opening. A first etching process is performed on the opening with the first protection layer thereon, to simultaneously remove the first protection layer on a sidewall of the opening and a portion of the substrate to deepen a depth of the opening.

Abstract: A collaborative session (e.g., a virtual time capsule) in which access to a collaborative object and added virtual content is selectively provided to participants/users. In one example of the collaborative session, authentication of the collaborative object is performed by all of the users to complete the collaborative session. Each user authenticates the collaborative object, such as using a stamping gesture on a user interface of a client device or in an augmented reality session. User specific data is recorded with the stamping gesture to authenticate the collaborative object and the associated virtual content. In an example, user specific data may include device information, participant profile information, or biometric signal information. Biometric signal information, such as a fingerprint from a mobile device or a heart rate received from a connected smart device can be used to provide an authenticating signature to the seal.

Abstract: A method of manufacturing a gallium nitride device with field plate structure, including forming a passivation layer covering a substrate and a gate, forming recesses in the passivation layer to define a source region and a drain region, forming a source and a drain on the passivation layer, forming a first ILD layer, a stop layer and a second ILD layer sequentially on the source, the drain and the passivation layer, patterning the first ILD layer, the stop layer and the second ILD layer to form dual-damascene recesses, and filling metal in the dual-damascene recesses to form dual-damascene interconnects connecting respectively with the source and the drain.

Abstract: The present invention relates to epitopes located in CAIX and anti-CAIX antibodies having binding activity with cancer cells. The present invention also relates to the composition and application of the CAIX epitopes and anti-CAIX antibodies in the diagnosis, prevention and/or treatment of cancers.

Abstract: A method for performing garbage collection (GC) management of a memory device with aid of block classification and associated apparatus are provided. The method may include: utilizing a memory controller to divide at least one portion of blocks among a plurality of blocks into multiple first blocks belonging to at least one first type in a first area and multiple second blocks belonging to at least one second type in a second area; utilizing the memory controller to receive a first command from a host device through a transmission interface circuit within the memory controller; and during writing data in response to the first command, performing a foreground GC procedure to control the memory device to perform GC before completing at least one writing operation corresponding to the first command, for controlling priority of releasing storage space of the second area to be higher than that of the first area.

Abstract: A semiconductor device includes a first semiconductor component, a second semiconductor component, and a damage detection structure. The first semiconductor component includes a first edge region. The second semiconductor component is stacked below the first semiconductor component and includes a second edge region. The damage detection structure includes a plurality of first conductive paths and a plurality of second conductive paths. The first conductive paths are disposed in the first edge region. The second conductive paths are disposed in the second edge region and are electrically coupled to the first conductive paths.

Abstract: The presently claimed invention relates to dielectric polishing composition and methods thereof. The presently claimed invention particularly relates to a composition comprising: (A) surface-modified colloidal silica particles comprising a negatively-charged group on the surface of the particles, wherein the surface-modified colloidal silica particles have a negative charge, a particle size of from 60 nm to 200 nm, and a zeta potential <?35 mV at a pH in the range of from ?2.0 to ?4.5; (B) first corrosion inhibitor selected from at least one guanidine derivative; (C) second corrosion inhibitor selected from polyacrylamides or polyacrylamide copolymers; (D) at least one iron (III) oxidizer; (E) at least one silicon oxide removal rate enhancer selected from phosphoric acid and salts thereof; (F) at least one stabilizer; and (G) an aqueous medium, wherein the pH of the composition is in the range of from ?2.0 to ?4.5.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a first vertical transistor. The first vertical transistor includes a first channel region. The first vertical transistor further includes a first word line wrapping the first channel region. The first vertical transistor also includes a first word line dielectric layer between the first channel region and the first word line. The first vertical transistor furthermore includes a first conductive liner between the first word line dielectric layer and the first word line.