Patents by Inventor YU-TSE WANG

YU-TSE WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11915755
    Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
  • Patent number: 9880252
    Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: January 30, 2018
    Assignee: MPI CORPORATION
    Inventors: Wei-Cheng Ku, Shao-Wei Lu, Hao Wei, Yu-Tse Wang
  • Patent number: 9759743
    Abstract: A testing system includes a test machine, a plurality of probe sets, a data input device, a controller, a memory, and a data output device. The test machine has a platform for a DUT to be placed thereon, and a test arm which is movable relative to the platform. The probe sets are provided on the test machine with at least one probe set provided on the test arm to contact the DUT. The data input device is used to input information about the DUT. The controller is electrically connected to the test arm, the probe set on the test arm, and the data input device to move the test arm to a predetermined position according to the inputted information, and to make the probe set contact the DUT for electrical test. The memory saves electrical test result, which is outputted by the data output device.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: September 12, 2017
    Assignee: MPI CORPORATION
    Inventors: Wei-Cheng Ku, Shao-Wei Lu, Hao Wei, Yu-Tse Wang
  • Publication number: 20170146634
    Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.
    Type: Application
    Filed: January 9, 2017
    Publication date: May 25, 2017
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHAO-WEI LU, HAO WEI, YU-TSE WANG
  • Patent number: 9645197
    Abstract: A method of operating a testing system is provided, wherein the testing system has a test machine and a probe module, which has a first probe set and a second probe set. One of the first probe set and the second probe set can be connected to the test machine. The method includes the following steps: connect the test machine and the first probe set; calibrate the testing system; abut the first probe set against a DUT to do electrical tests; disconnect the first probe set and the DUT; disconnect the test machine and the first probe set; connect the test machine and the second probe set; calibrate the testing system again; abut the second probe set against the DUT to do electrical tests.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: May 9, 2017
    Assignee: MPI CORPORATION
    Inventors: Wei-Cheng Ku, Shao-Wei Lu, Hao Wei, Yu-Tse Wang
  • Patent number: 9581676
    Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: February 28, 2017
    Assignee: MPI CORPORATION
    Inventors: Wei-Cheng Ku, Shao-Wei Lu, Hao Wei, Yu-Tse Wang
  • Publication number: 20150241544
    Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.
    Type: Application
    Filed: November 25, 2014
    Publication date: August 27, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHAO-WEI LU, HAO WEI, YU-TSE WANG
  • Publication number: 20150233969
    Abstract: A testing system includes a test machine, a plurality of probe sets, a data input device, a controller, a memory, and a data output device. The test machine has a platform for a DUT to be placed thereon, and a test arm which is movable relative to the platform. The probe sets are provided on the test machine with at least one probe set provided on the test arm to contact the DUT. The data input device is used to input information about the DUT. The controller is electrically connected to the test arm, the probe set on the test arm, and the data input device to move the test arm to a predetermined position according to the inputted information, and to make the probe set contact the DUT for electrical test. The memory saves electrical test result, which is outputted by the data output device.
    Type: Application
    Filed: November 25, 2014
    Publication date: August 20, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHAO-WEI LU, HAO WEI, YU-TSE WANG
  • Publication number: 20150212186
    Abstract: A method of calibrating and operating a testing system is provided, wherein the testing system has a test machine, a conducting wire set, a calibration module, and a probe module. The method includes the following steps: electrically connect the test machine and the conducting wire set; electrically connect the conducting wire set and the calibration module; send out electrical signals from the test machine to the calibration module for doing at least one test among a short-circuit test, an open-circuit test, and an impedance test, and then calibrate the testing system by correspondingly performing compensation based on results of these tests; electrically disconnect the conducting wire set and the calibration module, and electrically connect the conducting wire set and the probe module; abut the probe module against a DUT; send out electrical signals from the test machine to the probe module to do electrical tests on the DUT.
    Type: Application
    Filed: December 2, 2014
    Publication date: July 30, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHAO-WEI LU, SHOU-JEN TSAI, YU-TSE WANG
  • Publication number: 20150204929
    Abstract: A testing system includes a test machine, a communication device, a server, and a user-end device. The test machine does electrical test on an electronic product, wherein the test machine generates a first signal when the test is completed, and generates a second signal when the measured yield is lower than a predetermined threshold. The communication device is electrically connected to the test machine to receive the first signal or the second signal. The communication device correspondingly converts the received signals into first information or second information, and then outputs the first and the second information to a first network. The server communicates with the first network to receive the first and the second information outputted by the communication device, and then outputs the received information to a second network. The user-end device communicates with the second network to receive the first and the second information outputted by the server.
    Type: Application
    Filed: December 1, 2014
    Publication date: July 23, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHOA-WEI LU, YU-TSE WANG
  • Publication number: 20150204962
    Abstract: A method of operating a testing system is provided, wherein the testing system has a test machine and a probe module, which has a first probe set and a second probe set. One of the first probe set and the second probe set can be connected to the test machine. The method includes the following steps: connect the test machine and the first probe set; calibrate the testing system; abut the first probe set against a DUT to do electrical tests; disconnect the first probe set and the DUT; disconnect the test machine and the first probe set; connect the test machine and the second probe set; calibrate the testing system again; abut the second probe set against the DUT to do electrical tests.
    Type: Application
    Filed: December 1, 2014
    Publication date: July 23, 2015
    Applicant: MPI CORPORATION
    Inventors: WEI-CHENG KU, SHAO-WEI LU, HAO WEI, YU-TSE WANG