Patents by Inventor Yu-Tung LIAO

Yu-Tung LIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250055468
    Abstract: A time-interleaved analog-to-digital converter includes sampling circuits, amplifier circuits, analog-to-digital converter circuits, and a detector circuitry. The sampling circuits are configured to an input signal according to first clock signals, to generate first signals. The amplifier circuits are configured to generate second signals according to the first signals. The analog-to-digital converter circuits are configured to convert the second signals to generate a digital signals. The detector circuitry is configured to adjust a delay time of each of the first clock signals, and calibrate gains of the amplifier circuits according to the digital signals.
    Type: Application
    Filed: May 23, 2024
    Publication date: February 13, 2025
    Inventors: YU-TUNG LIAO, Cheng-Hsien Li, Tsung-En Wu, Bo-Rong Huang
  • Patent number: 11558126
    Abstract: An echo estimation system includes a transceiver circuitry and a processor circuitry. The processor circuitry is coupled to the transceiver circuitry. The processor circuitry is configured to calculate linear echo power and non-linear echo power based on a signal under test in the transceiver circuitry. The linear echo power and the non-linear echo power are utilized to determine a quality of the transceiver circuitry or utilized to determine component parameters of the transceiver circuitry.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: January 17, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Bo-Rong Huang, Cheng-Hsien Li, Tsung-En Wu, Yu-Tung Liao
  • Publication number: 20220014281
    Abstract: An echo estimation system includes a transceiver circuitry and a processor circuitry. The processor circuitry is coupled to the transceiver circuitry. The processor circuitry is configured to calculate linear echo power and non-linear echo power based on a signal under test in the transceiver circuitry. The linear echo power and the non-linear echo power are utilized to determine a quality of the transceiver circuitry or utilized to determine component parameters of the transceiver circuitry.
    Type: Application
    Filed: May 28, 2021
    Publication date: January 13, 2022
    Inventors: Bo-Rong HUANG, Cheng-Hsien LI, Tsung-En WU, Yu-Tung LIAO