Patents by Inventor YU-WEI HSIAO

YU-WEI HSIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200026464
    Abstract: A data writing method is provided. The method includes receiving a first write command and first data corresponding to the first write command from a host system, wherein the first write command instructs to store the first data into a first logical address; copying the first data into a register, responding to the host system that the first write command is completed, and starting to execute a first program operation to program the first data into a first physical page; and in response to determining that the first program operation is failed, reading the first data from the register according to a logical to physical addresses mapping table and mandatorily programming the first data into a second physical page.
    Type: Application
    Filed: September 20, 2018
    Publication date: January 23, 2020
    Applicant: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Heng-Lin Yen, Hung-Chih Hsieh, Tzu-Wei Fang, Yu-Hua Hsiao
  • Patent number: 10533962
    Abstract: The present invention provides a gas sensor structure comprising a gas sensing chip. The back of the sensing material is a hollow structure. An insulating layer is below the sensing material. A micro heating is disposed surrounding the sensing material. The sensing material adheres to sensing electrodes. The sensing material is a complex structure including a metal oxide semiconductor and a roughened lanthanum-carbonate gas sensing layer. The thickness of the metal oxide semiconductor is between 0.2 ?m and 10 ?m; the thickness of the roughened lanthanum-carbonate gas sensing layer is between 0.1 ?m and 4 ?m; and the size of the back etching holes is smaller than 1*1 mm. By using the gas sensor structure according to the present invention, a suspended gas sensing structure can be fabricated on a silicon substrate and the chip size can be minimized.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 14, 2020
    Assignee: National Applied Research Laboratories
    Inventors: Yu-Jen Hsiao, Ting-Jen Hsueh, Yu-Te Lin, Yen-Hsi Li, Jia-Min Shieh, Chien-Wei Liu, Chi-Wei Chiang
  • Publication number: 20200014931
    Abstract: Video processing methods and apparatuses for coding a current block by constructing a candidate set including at least a motion candidate and at least an average candidate. The average candidate is derived from motion information of neighboring blocks, and at least one neighboring block used to derive the average candidate is a temporal block in a temporal collocated picture. Each of the neighboring blocks is a spatial neighboring block in a current picture or a temporal block in the temporal collocated picture. A selected candidate is determined from the candidate set as a motion vector predictor for encoding or decoding a motion vector of the current block.
    Type: Application
    Filed: July 4, 2019
    Publication date: January 9, 2020
    Inventors: Yu-Ling HSIAO, Tzu-Der CHUANG, Chih-Wei HSU, Ching-Yeh CHEN
  • Patent number: 10515712
    Abstract: A memory management method and a storage controller using the same are provided. The method includes reading a target word-line to identify a plurality of raw Gray code indexes corresponding to a plurality of memory cells of the target word-line; performing a decoding operation on raw data of the target word-line to identify a plurality of decoded Gray code indexes corresponding to the memory cells; calculating a plurality of Gray code absolute bias values corresponding to the memory cells according to the raw Gray code indexes and the decoded Gray code indexes; and identifying one or more abnormal memory cells among the memory cells according to the Gray code absolute bias values; and recording the one or more abnormal memory cells into an abnormal memory cell table, wherein a Gray code absolute bias value of each of the one or more abnormal memory cells is greater than a bias threshold.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: December 24, 2019
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Chia-Wei Chang
  • Publication number: 20190386204
    Abstract: Various embodiments of the present application are directed towards a method for forming a flat via top surface for memory, as well as an integrated circuit (IC) resulting from the method. In some embodiments, an etch is performed into a dielectric layer to form an opening. A liner layer is formed covering the dielectric layer and lining the opening. A lower body layer is formed covering the dielectric layer and filling a remainder of the opening over the liner layer. A top surface of the lower body layer and a top surface of the liner layer are recessed to below a top surface of the dielectric layer to partially clear the opening. A homogeneous upper body layer is formed covering the dielectric layer and partially filling the opening. A planarization is performed into the homogeneous upper body layer until the dielectric layer is reached.
    Type: Application
    Filed: August 27, 2019
    Publication date: December 19, 2019
    Inventors: Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao, Wen-Ting Chu, Yu-Wen Liao, I-Ching Chen
  • Patent number: 10510379
    Abstract: A method for controlling operations of a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method can comprise: before a voltage-drop event regarding a driving voltage occurs, mapping a rising reference voltage and a falling reference voltage to a first reference voltage and a second reference voltage, respectively; when the voltage-drop event occurs, pausing at least one access operation to a non-volatile (NV) memory, and mapping the rising reference voltage and the falling reference voltage to another first reference voltage and another second reference voltage, respectively; and when the voltage-drop event ends, mapping the rising reference voltage and the falling reference voltage to the first reference voltage and the second reference voltage, respectively.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: December 17, 2019
    Assignee: Silicon Motion, Inc.
    Inventors: Yu-Wei Chyan, Li-Shuo Hsiao
  • Publication number: 20190371369
    Abstract: A method for controlling operations of a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method can comprise: before a voltage-drop event regarding a driving voltage occurs, mapping a rising reference voltage and a falling reference voltage to a first reference voltage and a second reference voltage, respectively; when the voltage-drop event occurs, pausing at least one access operation to a non-volatile (NV) memory, and mapping the rising reference voltage and the falling reference voltage to another first reference voltage and another second reference voltage, respectively; and when the voltage-drop event ends, mapping the rising reference voltage and the falling reference voltage to the first reference voltage and the second reference voltage, respectively.
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Inventors: Yu-Wei Chyan, Li-Shuo Hsiao
  • Publication number: 20190347192
    Abstract: A Memory management method for a storage device having a rewritable non-volatile memory module is provided. The rewritable non-volatile memory module has a plurality of physical blocks divided into a plurality of block stripes. The method includes: scanning the physical blocks to identify one or more bad physical blocks among the physical blocks; calculating a plurality of effective weight values corresponding to the block stripes according to a plurality of data accessing time parameters of the rewritable non-volatile memory module, a plurality of valid data counts, and the identified one or more bad physical blocks; and selecting a target block stripe from the block stripes according to the effective weight values to perform a garbage collection operation.
    Type: Application
    Filed: July 17, 2018
    Publication date: November 14, 2019
    Applicant: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Hung-Chih Hsieh, Tzu-Wei Fang
  • Publication number: 20190348520
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.
    Type: Application
    Filed: June 4, 2018
    Publication date: November 14, 2019
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Yu-Ren Wang, Ying-Wei Yen, Fu-Jung Chuang, Ya-Yin Hsiao, Nan-Yuan Huang
  • Patent number: 10460815
    Abstract: A decoding method and a storage controller for a rewritable non-volatile memory module are provided. The method includes choosing a target word line among a plurality of word lines, wherein a plurality of target memory cells of the target word-line are programmed; reading the target memory cells by respectively using different X read voltage sets, so as to obtain X Gray code count deviation summations, wherein the X read voltage sets and the corresponding X Gray code count deviation summations are all ordered based on a first predefined order; and choosing one of the X read voltage sets as an optimized read voltage set according to the X Gray code count deviation summations.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: October 29, 2019
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Tzu-Wei Fang
  • Publication number: 20190303239
    Abstract: A memory management method for a storage device having a rewritable non-volatile memory module is provided, wherein the rewritable non-volatile memory module has a plurality of physical units, and each of the physical units has a plurality of word-lines. The method includes: performing a first checking operation on a target physical unit among the physical units according to an occurrence of a specific event; and determining whether a first operation needs to be performed on valid data in the target physical unit according to a checking result of the first checking operation that corresponds to the target physical unit.
    Type: Application
    Filed: July 3, 2018
    Publication date: October 3, 2019
    Applicant: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Chia-Wei Chang
  • Publication number: 20190304546
    Abstract: A decoding method and a storage controller for a rewritable non-volatile memory module are provided. The method includes choosing a target word line among a plurality of word lines, wherein a plurality of target memory cells of the target word-line are programmed; reading the target memory cells by respectively using different X read voltage sets, so as to obtain X Gray code count deviation summations, wherein the X read voltage sets and the corresponding X Gray code count deviation summations are all ordered based on a first predefined order; and choosing one of the X read voltage sets as an optimized read voltage set according to the X Gray code count deviation summations.
    Type: Application
    Filed: July 11, 2018
    Publication date: October 3, 2019
    Applicant: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Tzu-Wei Fang
  • Patent number: 10431262
    Abstract: A method for controlling operations of a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method can comprise: before a voltage-drop event regarding a driving voltage occurs, mapping a rising reference voltage and a falling reference voltage to a first reference voltage and a second reference voltage, respectively; when the voltage-drop event occurs, pausing at least one access operations to a non-volatile (NV) memory, and mapping the rising reference voltage and the falling reference voltage to another first reference voltage and another second reference voltage, respectively; and when the voltage-drop event ends, mapping the rising reference voltage and the falling reference voltage to the first reference voltage and the second reference voltage, respectively.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 1, 2019
    Assignee: Silicon Motion Inc.
    Inventors: Yu-Wei Chyan, Li-Shuo Hsiao
  • Patent number: 10421797
    Abstract: The present invention relates to a short peptide-based therapeutic agent and a medicinal composition including the same for inhibiting activities of cancer cells, which includes at least one short peptide listed as SEQ ID NOs: 1 and 2, either of which is unglycosylated and has no more than 40 amino acid residues, thereby specifically reducing or inhibiting activities of cancer cells such as the cancer cell proliferation, cancer stemness, cell migration, cancer cell invasion, metastasis or drug resistance.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: September 24, 2019
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ju-Ming Wang, Yu-Wei Hsiao, Jhih-Ying Chi
  • Publication number: 20190289315
    Abstract: Video processing methods and apparatuses for coding a current block by constructing a candidate set including an average candidate generated from two or more original motion candidates. At least one MV of the average candidate is derived by directly averaging MVs of the original motion candidates in one of list 0 and list 1 without scaling regardless whether the MVs are pointing to same or different reference pictures. A selected candidate is determined from the candidate set as a MVP for a current MV of the current block for encoding or decoding the current block.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 19, 2019
    Inventors: Yu-Ling HSIAO, Tzu-Der CHUANG, Chih-Wei HSU, Chun-Chia CHEN
  • Patent number: 10348232
    Abstract: A motor system with a current sensorless control includes a motor, a drive module, and a motor control module. The motor control module controls the motor to rotate through the drive module. The motor control module includes a command generation module, a command conversion module, and an angle generation module. The command generation module generates speed information and transmits the speed information to the angle generation module, and the command generation module generates a voltage command and transmits the voltage command to the command conversion module. The angle generation module generates an electrical angle. The command conversion module converts the voltage command and the electrical angle into a control signal. The motor control module adjusts a phase of a motor input voltage to meet a phase of a motor input current according to the control signal.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: July 9, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hung Hsiao, Yu-Wei Lee, Wei-Shuo Tseng
  • Publication number: 20190198406
    Abstract: A substrate includes a substrate body and an interconnection layer disposed on a bearing surface of the substrate body and having an annular portion and a plurality of protrusions extending outward from an outer periphery of the annular portion. A package module is formed by the substrate, a chip mounted on the bearing surface of the substrate body, and a cap enclosing the chip and having a bottom thereof adhered to the interconnection layer of the substrate by an adhesive. By means of the protrusions of the interconnection layer, the bonding area of the adhesive is increased and the spread of the adhesive is effectively concentrated.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 27, 2019
    Inventors: Yu-Shiang CHEN, Chao-Wei YU, Yu-Lin HSIAO, Ming-Te TU
  • Patent number: 10312169
    Abstract: A substrate includes a substrate body and an interconnection layer disposed on a bearing surface of the substrate body and having an annular portion and a plurality of protrusions extending outward from an outer periphery of the annular portion. A package module is formed by the substrate, a chip mounted on the bearing surface of the substrate body, and a cap enclosing the chip and having a bottom thereof adhered to the interconnection layer of the substrate by an adhesive. By means of the protrusions of the interconnection layer, the bonding area of the adhesive is increased and the spread of the adhesive is effectively concentrated.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: June 4, 2019
    Assignee: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Yu-Shiang Chen, Chao-Wei Yu, Yu-Lin Hsiao, Ming-Te Tu
  • Patent number: 10297702
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: May 21, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20190147920
    Abstract: A method for controlling operations of a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method can comprise: before a voltage-drop event regarding a driving voltage occurs, mapping a rising reference voltage and a falling reference voltage to a first reference voltage and a second reference voltage, respectively; when the voltage-drop event occurs, pausing at least one access operations to a non-volatile (NV) memory, and mapping the rising reference voltage and the falling reference voltage to another first reference voltage and another second reference voltage, respectively; and when the voltage-drop event ends, mapping the rising reference voltage and the falling reference voltage to the first reference voltage and the second reference voltage, respectively.
    Type: Application
    Filed: May 29, 2018
    Publication date: May 16, 2019
    Inventors: Yu-Wei Chyan, Li-Shuo Hsiao