Patents by Inventor Yu-Wei Hsueh

Yu-Wei Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171161
    Abstract: A frequency calibration (FCAL) circuit and a method for calibrating an oscillation frequency of a controllable oscillator are provided. The FCAL circuit includes the controllable oscillator, a divider, a time-to-digital converter (TDC) and a calibration logic. The controllable oscillator generates a controllable oscillation clock according to a calibration code. The divider divides the oscillation frequency of the controllable oscillation clock by a predetermined divisor to generate a divided clock. The TDC converts a first period between first edges of a reference clock and the divided clock into a first period code and converts a second period between second edges of the reference clock and the divided clock into a second period code. The calibration logic compares the first period code and the second period code to generate a comparison result for determining whether the first period is greater or less than the second period, and accordingly controls the calibration code.
    Type: Application
    Filed: July 18, 2023
    Publication date: May 23, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chien-Wei Chen, Kairen Fong, Chao-Ching Hung, Yu-Li Hsueh
  • Patent number: 8147909
    Abstract: Provided is a method for processing a wafer that includes providing an alloy susceptor including an exterior surface and a wafer contact surface. The exterior surface of the alloy susceptor is treated to produce a roughness of the exterior surface. The roughened exterior surface of is coated with a ceramic material. The alloy susceptor including the ceramic-coated roughened exterior surface is positioned in a wafer process chamber. A plurality of layers of a film are deposited on the ceramic-coated roughened exterior surface of the alloy susceptor, wherein a first adhesion exists between the plurality of layers of the film and the ceramic material coated on the roughened exterior surface of the alloy susceptor that is greater than a second adhesion that would exist between the plurality of layers of the film and a non-roughened exterior surface of the alloy susceptor without the ceramic material.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: April 3, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuo-Jieh Wu, Hsu Chun Yuan, Tung-Li Lee, Steven Li, Hs Chiu, Yen-Yu Chen, Alan Chen, Ming Jie He, Yu-Wei Hsueh
  • Publication number: 20100247773
    Abstract: Provided is a method for processing a wafer that includes providing an alloy susceptor including an exterior surface and a wafer contact surface. The exterior surface of the alloy susceptor is treated to produce a roughness of the exterior surface. The roughened exterior surface of is coated with a ceramic material. The alloy susceptor including the ceramic-coated roughened exterior surface is positioned in a wafer process chamber. A plurality of layers of a film are deposited on the ceramic-coated roughened exterior surface of the alloy susceptor, wherein a first adhesion exists between the plurality of layers of the film and the ceramic material coated on the roughened exterior surface of the alloy susceptor that is greater than a second adhesion that would exist between the plurality of layers of the film and a non-roughened exterior surface of the alloy susceptor without the ceramic material.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shuo-Jieh Wu, Hsu Chun Yuan, Tung-Li Lee, Steven Lin, Hs Chiu, Yen-Yu Chen, Alan Chen, Ming Jie He, Yu-Wei Hsueh