Patents by Inventor Yu-Wen A. Huang

Yu-Wen A. Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230199199
    Abstract: Various schemes pertaining to video coding parallelization techniques are described. An apparatus receives video data. The apparatus subsequently calculates a plurality of figures of merits (FOMs), each of the FOM representing how well a particular coding tool may perform in encoding the video data. The apparatus further determines a coding tool that may be suitable for encoding the video data by comparing the FOMs. In determining the coding tool, the apparatus utilizes time-interleaving techniques to parallelly process the video data. The video data may include an array of coding blocks, and the apparatus may receive the video data using a snake-like processing order scanning through the array of coding blocks.
    Type: Application
    Filed: November 1, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230200043
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Julie ROLLINS, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Yu-Wen HUANG, Shu ZHOU
  • Publication number: 20230199217
    Abstract: A video encoder receives raw pixel data to be encoded as a current block of a current picture of a video into a bitstream. The video encoder identifies multiple candidate bi-prediction positions for the current block, including a center position, a first set of offset positions, and a second set of offset positions. The first set of offset positions and the second set of offset positions interleave each other. The encoder computes distortion values for each of the candidate bi-prediction positions based on several possible weighting parameter values. The distortion values for the center position are based on each of the several possible weighting parameter values. The distortion values for the first set of offset positions are based on a first subset of the possible weighting parameter values. The distortion values for the second set of offset positions are based on a second subset of the possible weighting parameter values.
    Type: Application
    Filed: November 22, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 11680291
    Abstract: The present invention discloses a Polymerase Chain Reaction (PCR) apparatus for real-time detecting of one or more fluorescent signals. According to the apparatus, the PCR is performed by controlling heating and cooling intervals of a reagent container receiving space. With the aid of an added specific probe and fluorescent material, as well as a light source and a spectrometer, a generated fluorescent signal is detected. Meanwhile, the apparatus is also pre-loaded with an algorithm configured to analyze and quantify the fluorescent signal in a real-time manner.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: June 20, 2023
    Assignee: CREDO DIAGNOSTICS BIOMEDICAL PTE, LTD.
    Inventors: Ying-Ta Lai, Yu-Cheng Ou, Chun-Te Wu, Yu-Wen Huang, Han-Yi Chen
  • Publication number: 20230188745
    Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to receive compressed video data, wherein the compressed video data is related to a set of frames. A decoder-side predictor refinement technique is used to calculate a new motion vector for a current frame from the set of frames, wherein the new motion vector estimates motion for the current frame based on one or more reference frames. An existing motion vector associated with a different frame from a motion vector buffer is retrieved. The new motion vector is calculated based on the existing motion vector using a decoder-side motion vector prediction technique, such that the existing motion vector is in the motion vector buffer after calculating the new motion vector.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Applicant: HFI Innovation Inc.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20230171403
    Abstract: Video encoding methods and apparatuses include collecting statistics data, determining a matrix and vector representing a set of linear equations, solving the matrix and vector by a novel Gaussian elimination method to derive optimal parameter adjustments for an affine mode or adaptive loop filter coefficients, and encoding the current block by the affine mode or encoding one or more blocks by applying ALF filtering. Embodiments of the novel Gaussian elimination method reduce the critical path of entry operations in each row elimination step from one reciprocal, two multiplication, and one addition operations to one reciprocal, one multiplication, and one addition operations, or one multiplication and one addition operations.
    Type: Application
    Filed: March 23, 2022
    Publication date: June 1, 2023
    Inventors: Shih-Chun CHIU, Tzu-Der CHUANG, Ching-Yeh CHEN, Chun-Chia CHEN, Chih-Wei HSU, Yu-Wen HUANG
  • Patent number: 11659198
    Abstract: Method and apparatus of video coding using decoder derived motion information based on bilateral matching or template matching are disclosed. According to one method, merge index for merge candidate group comprising bilateral matching merge candidate and/or template matching merge candidate are signalled using different codewords. According to another method, the first-stage MV or the first-stage MV pair is used as an only initial MV or MV pair or used as a central MV of search window for second-stage search. According to yet another method, after the reference template for a first reference list is found, the current template is modified for template search in the other reference list. According to yet another method, the sub-PU search is disabled for the template search. According to yet another method, block difference calculation is based on reduced bit depth during MV search associated with the decoder-side MV derivation process.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: May 23, 2023
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230156234
    Abstract: Video encoding methods and apparatuses include receiving reconstructed video samples, determining an initial clipping setting for ALF coefficients, deriving clipping setting candidates from the initial clipping setting. ALF coefficients for the initial clipping setting and the clipping setting candidates are derived by solving inverse matrices, where partial intermediate results of solving ALF coefficients are shared by two or more clipping settings. A distortion value corresponds to the derived ALF coefficients for each clipping setting is computed, and final clipping indices for final ALF coefficients are determined according to the distortion values. ALF filtering is applied to the reconstructed video samples based on the final ALF coefficients and the final clipping indices.
    Type: Application
    Filed: April 22, 2022
    Publication date: May 18, 2023
    Inventors: Shih-Chun CHIU, Chih-Wei HSU, Ching-Yeh CHEN, Chun-Chia CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Publication number: 20230156181
    Abstract: A video coding method and apparatus include receiving input data associated with a current block, determining a coding mode for the current block by disabling Geometric Partitioning Mode (GPM) when a size of the current block is greater than or equal to a threshold size, and encoding or decoding the current block according to the determined coding mode. In a high-throughput video encoder performing Rate Distortion Optimization (RDO) by parallel Processing Elements (PEs), all or partial PEs receive search range reference samples in a broadcasting form. The parallel PEs test multiple coding modes on various partitioning for the current block, decide a block partitioning structure for dividing the current block into one or more coding blocks, and decide a coding mode for each of the coding blocks.
    Type: Application
    Filed: March 3, 2022
    Publication date: May 18, 2023
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Publication number: 20230131291
    Abstract: According to a method for Adaptive Loop Filter (ALF) processing of reconstructed video, multiple indicators are signaled in slice at an encoder side or parsed at a decoder side, where the multiple indicators are Adaptive Parameter Set (APS) indices associated with temporal ALF filter sets for the ALF processing. A current indicator is determined from the multiple indicators, where the current indicator is used to select a current ALF filter set. Filtered-reconstructed pixels are derived for the current block by applying the current ALF filter to the current block. In another method, if the ALF processing applied at a target sample requires an outside sample on other side of a target virtual boundary from the target sample, the outside sample is replaced by a padded sample.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Applicant: HFI INNOVATION INC.
    Inventors: Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11638027
    Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to receive compressed video data, wherein the compressed video data is related to a set of frames. A decoder-side predictor refinement technique is used to calculate a new motion vector for a current frame from the set of frames, wherein the new motion vector estimates motion for the current frame based on one or more reference frames. An existing motion vector associated with a different frame from a motion vector buffer is retrieved. The new motion vector is calculated based on the existing motion vector using a decoder-side motion vector prediction technique, such that the existing motion vector is in the motion vector buffer after calculating the new motion vector.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: April 25, 2023
    Assignee: HFI Innovation, Inc.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20230119972
    Abstract: Video encoding methods and apparatuses for performing rate-distortion optimization by a hierarchical architecture include receiving input data associated with a current block in a current picture, determining a block partitioning structure to split the current block into coding blocks and determining a corresponding coding mode for each coding block by multiple Processing Element (PE) groups, and entropy encoding the coding blocks in the current block according to the coding modes determined by the PE groups. Each PE group has parallel PEs and is associated with a particular block size. The parallel PEs in each PE group test a number of coding modes on each partition or sub-partition of the current block to derive rate-distortion costs. The block partitioning structure and corresponding coding modes are then decided based on the rate-distortion costs derived by the PE groups.
    Type: Application
    Filed: January 18, 2022
    Publication date: April 20, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Patent number: 11610894
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Yu-Wen Huang, Shu Zhou
  • Publication number: 20230065083
    Abstract: Low-latency video coding methods and apparatuses include receiving input data associated with a current Intra slice composed of Coding Tree Units (CTU), where each CTU includes luma and chroma Coding Tree Blocks (CTBs), partitioning each CTB into non-overlapping pipeline units, and encoding or decoding the CTUs in the current Intra slices by performing processing of chroma pipeline units after beginning processing of luma pipeline units in at least one pipeline stage. Each of the pipeline units is processed by one pipeline stage after another pipeline stage, and different pipeline stages process different pipeline units simultaneously. The pipeline stage in the low-latency video coding methods and apparatuses simultaneously processes one luma pipeline unit and at least one previous chroma pipeline unit within one pipeline unit time interval.
    Type: Application
    Filed: December 16, 2021
    Publication date: March 2, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11589041
    Abstract: A method and apparatus of video coding incorporating Deep Neural Network are disclosed. A target signal is processed using DNN (Deep Neural Network), where the target signal provided to DNN input corresponds to the reconstructed residual, output from the prediction process, the reconstruction process, one or more filtering processes, or a combination of them. The output data from DNN output is provided for the encoding process or the decoding process. The DNN can be used to restore pixel values of the target signal or to predict a sign of one or more residual pixels between the target signal and an original signal. An absolute value of one or more residual pixels can be signalled in the video bitstream and used with the sign to reduce residual error of the target signal.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 21, 2023
    Assignee: MEDIATEK INC.
    Inventors: Yu-Wen Huang, Yu-Chen Sun, Tzu-Der Chuang, Jian-Liang Lin, Ching-Yeh Chen
  • Publication number: 20230047271
    Abstract: A down-sample video coding system is provided. A decoding system receives to be decoded data from a bitstream for one or more pictures of a video. Each picture includes pixels having different color components. The decoding system receives up-down-sampling parameters that are applicable to a current video unit in the received data. The up-down-sampling parameters include different subsets for different color components. The decoding system decodes the data to reconstruct the current video unit. The decoding system up-samples the reconstructed current video unit according to the up-down-sampling parameters. The different color components of the current video unit are up-sampled according to different subsets of the up-down-sampling parameters.
    Type: Application
    Filed: July 15, 2022
    Publication date: February 16, 2023
    Inventors: Olena Chubach, Yu-Wen Huang, Ching-Yeh Chen
  • Publication number: 20230047501
    Abstract: For each prediction candidate of a set of one or more prediction candidates of the current block, a video coder computes a matching cost between a set of reference pixels of the prediction candidate in a reference picture and a set of neighboring pixels of a current block in a current picture. The video coder identifies a subset of the reference pictures as major reference pictures based on a distribution of the prediction candidates among the reference pictures of the current picture. A bounding block is defined for each major reference picture, the bounding block encompassing at least portions of multiple sets of reference pixels for multiple prediction candidates. The video coder assigns an index to each prediction candidate based on the computed matching cost of the set of prediction candidates. A selection of a prediction candidate is signaled by using the assigned index of the selected prediction candidate.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 16, 2023
    Inventors: Chih-Yao Chiu, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11582454
    Abstract: A method and apparatus for video coding utilizing a current block, a maximum side of the transform block of the current block corresponds to 64. A scaling matrix is derived from elements of an 8×8 base scaling matrix, where the elements in a bottom-right 4×4 region of the 8×8 base scaling matrix are skipped, either not signaled or set to zero. According to another method, a current block belongs to a current picture in a first color format that has only a first color component. A first scaling matrix is signaled at the video encoder side or parsed at the video decoder side for the first color component of the current block. Signaling any second scaling matrix is disabled at the video encoder side or parsing any second scaling matrix is disabled at the video decoder side for a second or third color component of the current block.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: February 14, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Chen-Yen Lai, Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Yu-Wen Huang, Olena Chubach
  • Publication number: 20230007281
    Abstract: Video processing methods and apparatuses for processing a current block in a current picture by reference picture resampling include receiving input data of the current block, determining a scaling window of the current picture and a scaling window of a reference picture. The current picture and reference picture may have different scaling window sizes. A ratio between a scaling window width, height, or size of the current picture and a scaling window width, height, or size of the reference picture is constrained to be within a ratio constraint. A reference block is generated from the reference picture according to the ratio, and used to encode or decode the current block.
    Type: Application
    Filed: December 10, 2020
    Publication date: January 5, 2023
    Inventors: Tzu-Der CHUANG, Chih-Wei HSU, Ching-Yeh CHEN, Chia-Ming TSAI, Chun-Chia CHEN, Olena CHUBACH, Lulin CHEN, Yu-Wen HUANG
  • Publication number: 20220417179
    Abstract: A routing establishing method for constructing a routing of a chain network including communication routers, each including a wired communication module, a wireless communication module, and a device configuration file. In a wired exploration procedure, exploration is performed by the source communication router through the wired communication module to obtain a wired communication status between the source and the destination communication routers. In a wireless exploration procedure, exploration is performed by the source communication router through the wireless communication module to obtain a wireless communication status between the source and the destination communication routers. In a routing decision procedure, next hop of the source communication router and whether the transmission routing is through the wired or the wireless communication module are determined and set according to the wired and the wireless communication status.
    Type: Application
    Filed: August 26, 2021
    Publication date: December 29, 2022
    Applicants: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, CSBC Corporation, Taiwan
    Inventor: Yu-Wen HUANG