Patents by Inventor Yu-Wen Chou

Yu-Wen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128341
    Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 18, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chia-Hao Chang, Jih-Wen Chou, Hwi-Huang Chen, Hsin-Hong Chen, Yu-Jen Huang
  • Publication number: 20240094783
    Abstract: An example computing device includes a first housing portion, a second housing portion moveably connected to the first housing portion, a link to selectively secure the second housing portion to the first housing portion to inhibit movement of the second housing portion relative to the first housing portion, and a shape-memory alloy element to release the link to allow the second housing portion to move relative to the first housing portion.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Yu-Wen LIN, Chia-Ming TSAI, Shih-Jen CHOU, John Joseph GRODEN
  • Patent number: 11839020
    Abstract: A trace embedded probe device includes a circuit board including an insulating layer unit whose upper surface has first recesses and a second recess located therebetween, grounding traces and a signal trace whose trace main bodies are disposed in the recesses respectively and flush in elevation with the upper surface, and a grounding layer disposed on a lower surface of the insulating layer unit and connected with the grounding traces by conductive vias penetrating through the first recesses and the lower surface and provided therein with conductive layers. The trace main bodies, grounding layer and conductive layers are made of a same metal material. Probes are disposed on the grounding and signal traces respectively. The probe device is easy in control of distance, width, thickness and surface roughness of the traces, and beneficial to achieve the requirements of thin copper traces, fine pitch and high frequency testing.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: December 5, 2023
    Assignee: MPI CORPORATION
    Inventors: Yu-Shan Hu, Yi-Lung Lee, Shao-Lun Wei, Yu-Wen Chou
  • Publication number: 20230065896
    Abstract: A probe card and a wafer testing assembly thereof are provided. The wafer testing assembly includes a printed circuit board, a space transformer, a plurality of copper pillars and a plurality of strengthening structure units. The printed circuit board includes a bottom surface and a plurality of first contacts arranged on the bottom surface. The space transformer includes a top surface and a plurality of second contacts. The second contacts are arranged on the top surface and corresponding to the first contacts. The copper pillars are respectively arranged between the first contacts and the second contacts. Two ends of each of the copper pillars are respectively electrically connected to the first contacts and the second contacts. The strengthening structure units are arranged on the bottom surface of the printed circuit board and respectively surrounding the copper pillars.
    Type: Application
    Filed: July 1, 2022
    Publication date: March 2, 2023
    Applicant: MPI Corporation
    Inventors: Yi-Chien Tsai, Huo-Kang Hsu, Yu-Wen Chou, Yu-Shan Hu
  • Publication number: 20220349919
    Abstract: A probe installation circuit board includes an insulating layer provided on upper and lower surfaces thereof with a trace structure including two grounding traces and a signal trace located therebetween, and a grounding layer. Each grounding trace is connected with the grounding layer by at least one conductive via including a through hole penetrating through the grounding trace and the insulating layer, and a conductive layer disposed therein to electrically connect the grounding trace and layer. The signal trace and the conductive layers are made of a metal material. The grounding layer and traces are made of another metal material. A probe device includes the circuit board and three probes disposed on the traces respectively. The present invention is capable of thin copper traces and lowered trace surface roughness, easy in control of trace distance, width and thickness, and beneficial to achieve the fine pitch requirement.
    Type: Application
    Filed: April 22, 2022
    Publication date: November 3, 2022
    Applicant: MPI CORPORATION
    Inventors: YU-SHAN HU, SHAO-LUN WEI, YI-LUNG LEE, YU-WEN CHOU
  • Publication number: 20220312583
    Abstract: A trace embedded probe device includes a circuit board including an insulating layer unit whose upper surface has first recesses and a second recess located therebetween, grounding traces and a signal trace whose trace main bodies are disposed in the recesses respectively and flush in elevation with the upper surface, and a grounding layer disposed on a lower surface of the insulating layer unit and connected with the grounding traces by conductive vias penetrating through the first recesses and the lower surface and provided therein with conductive layers. The trace main bodies, grounding layer and conductive layers are made of a same metal material. Probes are disposed on the grounding and signal traces respectively. The probe device is easy in control of distance, width, thickness and surface roughness of the traces, and beneficial to achieve the requirements of thin copper traces, fine pitch and high frequency testing.
    Type: Application
    Filed: March 22, 2022
    Publication date: September 29, 2022
    Applicant: MPI CORPORATION
    Inventors: Yu-Shan HU, Yi-Lung LEE, Shao-Lun WEI, Yu-Wen CHOU
  • Patent number: 11150269
    Abstract: A probe head includes a probe seat, a first spring probe penetrating through upper, middle and lower dies of the probe seat for transmitting a first test signal, and at least two shorter second spring probes penetrating through the lower die for transmitting a second test signal with higher frequency. Two second spring probes are electrically connected in a way that top ends thereof are abutted against two electrically conductive contacts on a bottom surface of the middle die electrically connected by a connecting circuit therein. The lower die has a communicating space and at least two lower installation holes communicating therewith and each accommodating a second spring probe partially located in the communicating space. The probe head is adapted for concurrent high and medium or low frequency signal tests, meets fine pitch and high frequency testing requirements and prevents probe cards from too complicated circuit design.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: October 19, 2021
    Assignee: MPI CORPORATION
    Inventors: Hui-Pin Yang, Shang-Jung Hsieh, Yu-Wen Chou, Ching-Fang Yu, Huo-Kang Hsu, Chin-Tien Yang
  • Publication number: 20210048452
    Abstract: A probe head includes a probe seat, a first spring probe penetrating through upper, middle and lower dies of the probe seat for transmitting a first test signal, and at least two shorter second spring probes penetrating through the lower die for transmitting a second test signal with higher frequency. Two second spring probes are electrically connected in a way that top ends thereof are abutted against two electrically conductive contacts on a bottom surface of the middle die electrically connected by a connecting circuit therein. The lower die has a communicating space and at least two lower installation holes communicating therewith and each accommodating a second spring probe partially located in the communicating space. The probe head is adapted for concurrent high and medium or low frequency signal tests, meets fine pitch and high frequency testing requirements and prevents probe cards from too complicated circuit design.
    Type: Application
    Filed: August 11, 2020
    Publication date: February 18, 2021
    Applicant: MPI CORPORATION
    Inventors: Hui-Pin YANG, Shang-Jung HSIEH, Yu-Wen CHOU, Ching-Fang YU, Huo-Kang HSU, Chin-Tien YANG
  • Publication number: 20180341764
    Abstract: An unlocking method and an electronic device are provided. The electronic device stores a predetermined color sequence. The unlocking method is adapted for an electronic device having a display interface. The method includes: defining a plurality of blocks on the display interface; randomly allocating a plurality of colors to be displayed to the blocks; receiving locations of a plurality of tapping operations to generate a color sequence according to the colors displayed on the blocks which are tapped; comparing the color sequence with the predetermined color sequence; unlocking the electronic device if the color sequence is the same as the predetermined color sequence.
    Type: Application
    Filed: May 25, 2018
    Publication date: November 29, 2018
    Applicant: PEGATRON CORPORATION
    Inventor: Yu-Wen Chou
  • Patent number: 8717276
    Abstract: A displaying method used in a portable electronic device is provided. The portable electronic device includes a display panel having a backlight module. The displaying method includes the following steps: turning off the backlight module when a rotation event occurs; waiting for a time period; turning on the backlight module.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: May 6, 2014
    Assignee: Pegatron Corporation
    Inventors: Hsiao-Ming Huang, Yu-Ting Wang, Chia-Chi Ko, Heng-Yu Wu, Yu-Wen Chou, Pei-Yu Chen
  • Publication number: 20120074870
    Abstract: A displaying method used in a portable electronic device is provided. The portable electronic device includes a display panel having a backlight module. The displaying method includes the following steps: turning off the backlight module when a rotation event occurs; waiting for a time period; turning on the backlight module.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 29, 2012
    Applicant: PEGATRON CORPORATION
    Inventors: Hsiao-Ming Huang, Yu-Ting Wang, Chia-Chi Ko, Heng-Yu Wu, Yu-Wen Chou, Pei-Yu Chen