Patents by Inventor Yu-Wen Lee

Yu-Wen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387383
    Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and a dielectric foam disposed between the first and second portions of the conductive layer. The dielectric foam includes fluid gaps filled with carbon dioxide gas.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Wei-Hao LIAO, Hsi-Wen TIEN, Yu-Teng DAI, Chih-Wei LU, Hsin-Chieh YAO, Chung-Ju LEE
  • Patent number: 12149865
    Abstract: A conference system, including a remote device and a local device, is disclosed. The remote device includes a voice broadcasting element. The local device includes several image capture elements and a processor. When the remote device is communicatively connected through an internet to the local device, several image capture elements obtain a number of people present in a local environment of the local device. The processor, coupled to several image capture elements, generates a voice message according to the number of people present, and the processor transmits the voice message to the remote device, so that the voice broadcasting element of the remote device plays the voice message.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: November 19, 2024
    Assignee: AmTRAN Technology Co., Ltd.
    Inventors: Chiung Wen Tseng, Yu Ruei Lee, I Jui Yu
  • Publication number: 20240377364
    Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Jun-Hao DENG, Yu-Ching LEE, Kuan-Wen LIN, Sheng-Chi CHIN
  • Publication number: 20240371770
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate, a second interconnect dielectric layer arranged over the first interconnect dielectric layer, and an interconnect conductive structure arranged within the second interconnect dielectric layer. The interconnect conductive structure includes an outer portion that has a first conductive material. Further, the interconnect conductive structure includes a central portion having outermost sidewalls surrounded by the outer portion of the interconnect conductive structure. The central portion includes a second conductive material different than the first conductive material.
    Type: Application
    Filed: July 18, 2024
    Publication date: November 7, 2024
    Inventors: Yu-Teng Dai, Hsi-Wen Tien, Wei-Hao Liao, Hsin-Chieh Yao, Chih Wei Lu, Chung-Ju Lee
  • Publication number: 20240371779
    Abstract: The present disclosure relates to an integrated chip comprising a substrate. A first conductive wire is over the substrate. A second conductive wire is over the substrate and is adjacent to the first conductive wire. A first dielectric cap is laterally between the first conductive wire and the second conductive wire. The first dielectric cap laterally separates the first conductive wire from the second conductive wire. The first dielectric cap includes a first dielectric material. A first cavity is directly below the first dielectric cap and is laterally between the first conductive wire and the second conductive wire. The first cavity is defined by one or more surfaces of the first dielectric cap.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Hsin-Yen Huang, Chia-Tien Wu
  • Patent number: 12125795
    Abstract: The present disclosure relates to an integrated chip comprising a substrate. A first conductive wire is over the substrate. A second conductive wire is over the substrate and is adjacent to the first conductive wire. A first dielectric cap is laterally between the first conductive wire and the second conductive wire. The first dielectric cap laterally separates the first conductive wire from the second conductive wire. The first dielectric cap includes a first dielectric material. A first cavity is directly below the first dielectric cap and is laterally between the first conductive wire and the second conductive wire. The first cavity is defined by one or more surfaces of the first dielectric cap.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: October 22, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Hsin-Yen Huang, Chia-Tien Wu
  • Patent number: 12118183
    Abstract: An adaptive discussion-topic system, an operating method thereof, and a non-transitory computer-readable recording medium are provided. The adaptive discussion-topic system includes a server having a discussion-topic database and a software program executed in a user device for initiating a graphical user interface. When the server receives a selection of one of discussion-topic categories displayed on a first layer discussion-topic page, the discussion-topic database is queried for rendering a second layer discussion-topic page. The second layer discussion-topic page is displayed on the graphical user interface initiated by the user device, in which multiple discussion-topic areas are displayed in a first direction, and multiple discussion-topic areas associated with a location attribute or multiple discussion-topic categories that relate to topics of the discussion-topic areas in the first direction and match with a personal preference of a user are displayed in a second direction.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: October 15, 2024
    Assignee: FRAMY INC.
    Inventors: Yu-Hsien Li, Yu-Chih Lee, Hao-Wen Mei
  • Publication number: 20240332076
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Inventors: Wei-Yip Loh, Chih-Wei Chang, Hong-Mao Lee, Chun-Hsien Huang, Yu-Ming Huang, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Yu-Kai Chen, Yu-Wen Cheng
  • Patent number: 12105355
    Abstract: A wide-angle lens assembly includes a first lens, a second lens, a third lens, a fourth lens, and a fifth lens. The first lens is a meniscus lens with refractive power and includes a convex surface facing an object side and a concave surface facing an image side. The second lens is with refractive power. The third lens is with positive refractive power. The fourth lens is with refractive power. The fifth lens is with positive refractive power and includes a convex surface facing the image side. The first lens, the second lens, the third lens, the fourth lens, and the fifth lens are arranged in order from the object side to the image side along an optical axis.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: October 1, 2024
    Assignees: Sintai Optical (Shenzhen) Co., Ltd., Asia Optical Co., Inc.
    Inventors: Chia-Hung Sun, Tsan-Haw Lee, Yu-Wen Tai, Shu-Hung Lin
  • Patent number: 12094823
    Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and a dielectric foam disposed between the first and second portions of the conductive layer. The dielectric foam includes fluid gaps filled with carbon dioxide gas.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Hao Liao, Hsi-Wen Tien, Yu-Teng Dai, Chih Wei Lu, Hsin-Chieh Yao, Chung-Ju Lee
  • Publication number: 20240280872
    Abstract: The electronic device includes a substrate; an active layer disposed above the first substrate; a first signal line disposed above the substrate and overlapped with the active layer; and a conductive pattern disposed above the substrate. The conductive pattern includes a first side extending in a first direction, a second side extending in the first direction, and a third side connected between the first side and the second side, and wherein the third side includes a part that the part is not parallel to the first direction and not perpendicular to the first direction, and the part is located out of the first signal line and overlapped with the active layer.
    Type: Application
    Filed: April 30, 2024
    Publication date: August 22, 2024
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20240282623
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes includes a first insulating layer formed over a semiconductor substrate and conductive vias formed in the first insulating layer. The conductive structure also includes conductive lines and air gaps alternately formed over the first insulating layer. The conductive lines are correspondingly aligned to the conductive vias. The conductive structure further includes capping layers correspondingly covering the plurality of air gaps.
    Type: Application
    Filed: April 29, 2024
    Publication date: August 22, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsi-Wen TIEN, Wei-Hao LIAO, Yu-Teng DAI, Hsin-Chieh YAO, Chih-Wei LU, Chung-Ju LEE, Shau-Lin SHUE
  • Publication number: 20240250030
    Abstract: An electronic device is provided. The electronic device includes an inductor and a dielectric layer. The inductor includes a first magnetic layer, a conductive trace over the first magnetic layer, and a second magnetic layer over the conductive trace. The dielectric layer includes a first portion between the second magnetic layer and an inclined surface of the first magnetic layer. A substantially constant distance between the second magnetic layer and the inclined surface of the first magnetic layer is defined by the dielectric layer.
    Type: Application
    Filed: January 23, 2023
    Publication date: July 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Lin CHANG CHIEN, Yuan-Chun TAI, Chiu-Wen LEE, Yu-Hsun CHANG, Tai-Yuan HUANG
  • Patent number: 12046510
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yip Loh, Chih-Wei Chang, Hong-Mao Lee, Chun-Hsien Huang, Yu-Ming Huang, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Yu-Kai Chen, Yu-Wen Cheng
  • Publication number: 20240047491
    Abstract: A sensor package structure includes a substrate, a sensor chip disposed on the substrate, a light-curing layer disposed on the sensor chip, a light-permeable layer disposed on the light-curing layer, a shielding layer disposed on an inner surface of the light-permeable layer, a light filter layer arranged between the light-curing layer and the shielding layer, and a package body that is formed on the substrate. A projection region defined by orthogonally projecting the shielding layer onto a top surface of the sensor chip surrounds a sensing region of the sensor chip. The shielding layer has at least one light-permeable slot being covered by the light filter layer. The sensor chip, the light-curing layer, the light-permeable layer, the light filter layer, and the shielding layer are embedded in the package body that exposes at least part of the light-permeable layer.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 8, 2024
    Inventors: YU-WEN LEE, LI-CHUN HUNG
  • Patent number: 11604380
    Abstract: A display device includes a backlight module, a liquid crystal display panel and an optical module. The liquid crystal display panel is disposed on the backlight module. The liquid crystal display panel includes an array substrate, an opposite substrate, a display medium layer, an upper polarizing pattern, and a lower polarizing pattern. The upper polarizing pattern is disposed on the opposite substrate. The lower polarizing pattern is disposed on the array substrate and has a first transmission axis. The optical module is disposed between the backlight module and the liquid crystal display panel. The optical module includes a dual brightness enhancement film. The dual brightness enhancement film has a second transmission axis. The polarization direction of the light after passing through the optical module is different from the polarization direction of the light after passing through the lower polarizing pattern.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: March 14, 2023
    Assignee: Au Optronics Corporation
    Inventors: Zong-Huei Tsai, Yu-Wen Lee
  • Publication number: 20210333630
    Abstract: A display device includes a backlight module, a liquid crystal display panel and an optical module. The liquid crystal display panel is disposed on the backlight module. The liquid crystal display panel includes an array substrate, an opposite substrate, a display medium layer, an upper polarizing pattern, and a lower polarizing pattern. The upper polarizing pattern is disposed on the opposite substrate. The lower polarizing pattern is disposed on the array substrate and has a first transmission axis. The optical module is disposed between the backlight module and the liquid crystal display panel. The optical module includes a dual brightness enhancement film. The dual brightness enhancement film has a second transmission axis. The polarization direction of the light after passing through the optical module is different from the polarization direction of the light after passing through the lower polarizing pattern.
    Type: Application
    Filed: July 6, 2021
    Publication date: October 28, 2021
    Applicant: Au Optronics Corporation
    Inventors: Zong-Huei Tsai, Yu-Wen Lee
  • Patent number: 11099423
    Abstract: A display device includes a backlight module, a liquid crystal display panel and an optical module. The liquid crystal display panel is disposed on the backlight module. The liquid crystal display panel includes an array substrate, an opposite substrate, a display medium layer, an upper polarizing pattern, and a lower polarizing pattern. The upper polarizing pattern is disposed on the opposite substrate. The lower polarizing pattern is disposed on the array substrate and has a first transmission axis. The optical module is disposed between the backlight module and the liquid crystal display panel. The optical module includes a dual brightness enhancement film. The dual brightness enhancement film has a second transmission axis. The polarization direction of the light after passing through the optical module is different from the polarization direction of the light after passing through the lower polarizing pattern.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: August 24, 2021
    Assignee: Au Optronics Corporation
    Inventors: Zong-Huei Tsai, Yu-Wen Lee
  • Publication number: 20200132095
    Abstract: A fool-proof housing is configured for a first mounting piece which includes a first fool-proof recess or a second mounting piece which includes a second fool-proof recess to be disposed thereon. The fool-proof housing includes a casing and a fool-proof element. The fool-proof element includes a fool-proof protrusion. The fool-proof element is movably disposed on the casing and includes a first position and a second position. When the fool-proof element is in the first position, the casing is configured for the first mounting piece to be mounted thereon, and the fool-proof protrusion blocks the second mounting piece from mounted on the casing. When the fool-proof element is in the second position, the casing is configured for the second mounting piece to be mounted thereon, and the fool-proof protrusion blocks the first mounting piece from mounted on the casing.
    Type: Application
    Filed: December 1, 2018
    Publication date: April 30, 2020
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Hsin-Liang CHEN, Chih-Wei CHIANG, Yu Wen LEE
  • Publication number: 20200033677
    Abstract: A display device includes a backlight module, a liquid crystal display panel and an optical module. The liquid crystal display panel is disposed on the backlight module. The liquid crystal display panel includes an array substrate, an opposite substrate, a display medium layer, an upper polarizing pattern, and a lower polarizing pattern. The upper polarizing pattern is disposed on the opposite substrate. The lower polarizing pattern is disposed on the array substrate and has a first transmission axis. The optical module is disposed between the backlight module and the liquid crystal display panel. The optical module includes a dual brightness enhancement film. The dual brightness enhancement film has a second transmission axis. The polarization direction of the light after passing through the optical module is different from the polarization direction of the light after passing through the lower polarizing pattern.
    Type: Application
    Filed: December 10, 2018
    Publication date: January 30, 2020
    Applicant: Au Optronics Corporation
    Inventors: Zong-Huei Tsai, Yu-Wen Lee