Patents by Inventor Yu-Wen Liu

Yu-Wen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200230105
    Abstract: Provided is a long-acting method for preventing or treating glucose metabolism disorders that includes administering a beta-lactam compound or a pharmaceutically acceptable salt thereof to a subject in need thereof. The method for preventing or treating glucose metabolism disorders has a long-acting effect that lasts more than two days even after medication has been stopped.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 23, 2020
    Inventors: Feng-Ling Lee, Lung-Jr Lin, Jyh-Shing Hsu, Cheng-Hsien Hsu, Yen-Chun Huang, Ya-Chien Huang, Chun-Tsung Lo, Hui-Fang Liao, Yu-Wen Liu, Yu-Chi Kao
  • Publication number: 20200220098
    Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.
    Type: Application
    Filed: October 31, 2019
    Publication date: July 9, 2020
    Inventors: Tsung-Ting Tsai, Abbas Jamshidi Roudbari, Chuan-Sheng Wei, HanChi Ting, Jae Won Choi, Jianhong Lin, Nai-Chih Kao, Shih Chang Chang, Shin-Hung Yeh, Takahide Ishii, Ting-Kuo Chang, Yu Hung Chen, Yu-Wen Liu, Yu-Chuan Pai, Andrew Lin
  • Patent number: 10224238
    Abstract: A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: March 5, 2019
    Assignee: Apple Inc.
    Inventors: Chang Ming Lu, Chia-Yu Chen, Chih Pang Chang, Ching-Sang Chuang, Hung-Che Ting, Jung Yen Huang, Sheng Hui Shen, Shih Chang Chang, Tsung-Hsiang Shih, Yu-Wen Liu, Yu Hung Chen, Kai-Chieh Wu, Lun Tsai, Takahide Ishii, Chung-Wang Lee, Hsing-Chuan Wang, Chin Wei Hsu, Fu-Yu Teng
  • Patent number: 9859235
    Abstract: A system and method for forming an underbump metallization (UBM) is presented. A preferred embodiment includes a raised UBM which extends through a passivation layer so as to make contact with a contact pad while retaining enough of the passivation layer between the contact pad and the UBM to adequately handle the peeling and shear stress that results from CTE mismatch and subsequent thermal processing. The UBM contact is preferably formed in either an octagonal ring shape or an array of contacts.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: January 2, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wen Liu, Hao-Yi Tsai, Hsien-Wei Chen, Shin-Puu Jeng, Ying-Ju Chen, Shang-Yun Hou, Pei-Haw Tsao, Chen-Hua Yu
  • Publication number: 20170294499
    Abstract: A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.
    Type: Application
    Filed: September 16, 2016
    Publication date: October 12, 2017
    Inventors: Chang Ming Lu, Chia-Yu Chen, Chih Pang Chang, Ching-Sang Chuang, Hung-Che Ting, Jung Yen Huang, Sheng Hui Shen, Shih Chang Chang, Tsung-Hsiang Shih, Yu-Wen Liu, Yu Hung Chen, Kai-Chieh Wu, Lun Tsai, Takahide Ishii, Chung-Wang Lee, Hsing-Chuan Wang, Chin Wei Hsu, Fu-Yu Teng
  • Patent number: 9646954
    Abstract: An integrated circuit system comprising a first integrated and at least one of a second integrated circuit, interposer or printed circuit board. The first integrated circuit further comprising a wiring stack, bond pads electrically connected to the wiring stack, and bump balls formed on the bond pads. First portions of the wiring stack and the bond pads form a functional circuit, and second portions of the wiring stack and the bond pads form a test circuit. A portion of the bump balls comprising dummy bump balls. The dummy bump balls electrically connected to the second portions of the wiring stack and the bond pads. The at least one of the second integrated circuit, interposer or printed circuit board forming a portion of the test circuit.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: May 9, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Wei Liang, Yu-Wen Liu, Hsien-Wei Chen
  • Patent number: 9601446
    Abstract: A method of forming a bond pad structure is provided. The method includes forming a first conductive layer over a substrate and depositing a first dielectric layer over the first conductive layer. The first dielectric layer is patterned to form a contiguous planar path substantially parallel to a top surface of the substrate. Patterning the first dielectric layer includes defining a dielectric region of the first dielectric layer surrounded by a portion of the contiguous planar path, and forming a first via hole in the dielectric region. The contiguous planar path and the via hole are filled with a conductive material. The conductive material in the contiguous planar path forms a second conductive layer, and the contiguous planar path extends from a first lateral side wall of the second conductive layer to a second lateral sidewall of the second conductive layer. A bond pad is formed over the second conductive layer, and the bond pad is electrically connected to the second conductive layer.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: March 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Hsien-Wei Chen, Hao-Yi Tsai, Yu-Wen Liu
  • Patent number: 9536847
    Abstract: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiu-Ping Wei, Hsien-Wei Chen, Hao-Yi Tsai, Ying-Ju Chen, Yu-Wen Liu
  • Publication number: 20160184638
    Abstract: A fitness transmission apparatus including an information carrying assembly and an information reading assembly is provided. The information carrying assembly is disposed on a fitness equipment. The information carrying assembly is configured to record a weight information of the fitness equipment by using a plurality of information record combinations. The information reading assembly is disposed on the fitness equipment. The information reading assembly is configured to read the weight information in a predetermined manner based on types of the information record combinations. The information reading assembly is paired to the information carrying assembly in the predetermined manner to read the weight information. The information reading assembly transmits the read weight information to an electronic device. Furthermore, an information processing method is also provided.
    Type: Application
    Filed: December 27, 2015
    Publication date: June 30, 2016
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Wen Liu, Hsien-Tang Liao, Yi-Ju Liao, Chuang-Yueh Chen, I-Nan Liao, Nan-Ting Chen, Shih-Cheng Chou, Sheng-Hung Lee, Hao-Ying Chang
  • Publication number: 20160035684
    Abstract: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Inventors: Hsiu-Ping Wei, Hsien-Wei Chen, Hao-Yi Tsai, Ying-Ju Chen, Yu-Wen Liu
  • Publication number: 20160018848
    Abstract: A docking station including fixing base and at least one latching module is provided. The latching module includes a latching element, a first restoring element, a stopping element, a second restoring element and a pushing element. The first restoring element is connected to the latching element and the fixing base and drives the latching element to latch a tablet device. The stopping element is coupled to the latching element and has a recess. The second restoring element is connected to the stopping element and the fixing base and drives the stopping element to stop the latching element. The pushing element is adapted to be pushed and inserted into the recess to drive the stopping element to move away from the latching element, and the tablet device is adapted to be released from the latching element by pushing the latching element after the stopping element moves away from the latching element.
    Type: Application
    Filed: August 28, 2014
    Publication date: January 21, 2016
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Wen Liu, Chin-Kuo Huang, Long-Cheng Chang, Hsien-Tang Liao, Yi-Ju Liao
  • Patent number: 9239592
    Abstract: A docking station including fixing base and at least one latching module is provided. The latching module includes a latching element, a first restoring element, a stopping element, a second restoring element and a pushing element. The first restoring element is connected to the latching element and the fixing base and drives the latching element to latch a tablet device. The stopping element is coupled to the latching element and has a recess. The second restoring element is connected to the stopping element and the fixing base and drives the stopping element to stop the latching element. The pushing element is adapted to be pushed and inserted into the recess to drive the stopping element to move away from the latching element, and the tablet device is adapted to be released from the latching element by pushing the latching element after the stopping element moves away from the latching element.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: January 19, 2016
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Wen Liu, Chin-Kuo Huang, Long-Cheng Chang, Hsien-Tang Liao, Yi-Ju Liao
  • Patent number: 9171811
    Abstract: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: October 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Hsien-Wei Chen, Yu-Wen Liu, Ying-Ju Chen, Hsiu-Ping Wei
  • Patent number: 9138422
    Abstract: The present invention provides a method for inhibiting the growth of cancer stem cells, particularly colorectal cancer stem cells, liver cancer stem cells, lung cancer stem cells or breast cancer stem cells, comprising administering to a subject in need thereof a therapeutically effective amount of a compound of antimycin A or a pharmaceutically acceptable salt thereof, together with a pharmaceutically acceptable carrier.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: September 22, 2015
    Inventors: Chi-Ying F. Huang, Chi-Tai Yeh, Chun-Hung Wu, Yu-Wen Liu
  • Patent number: 9117831
    Abstract: A semiconductor device includes a substrate having a circuit region and a seal ring region. The seal ring region surrounds the circuit region. A seal ring structure is disposed over the seal ring region. The seal ring structure has a first portion and a second portion above the first portion. The first portion has a width W1, and the second portion has a width W2. The width W1 is less than the width W2.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: August 25, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Jung Yang, Yu-Wen Liu, Michael Shou-Ming Tong, Hsien-Wei Chen, Chung-Ying Yang, Tsung-Yuan Yu
  • Publication number: 20150194397
    Abstract: A method of forming a bond pad structure is provided. The method includes forming a first conductive layer over a substrate and depositing a first dielectric layer over the first conductive layer. The first dielectric layer is patterned to form a contiguous planar path substantially parallel to a top surface of the substrate. Patterning the first dielectric layer includes defining a dielectric region of the first dielectric layer surrounded by a portion of the contiguous planar path, and forming a first via hole in the dielectric region. The contiguous planar path and the via hole are filled with a conductive material. The conductive material in the contiguous planar path forms a second conductive layer, and the contiguous planar path extends from a first lateral side wall of the second conductive layer to a second lateral sidewall of the second conductive layer. A bond pad is formed over the second conductive layer, and the bond pad is electrically connected to the second conductive layer.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 9, 2015
    Inventors: Shin-Puu Jeng, Hsien-Wei Chen, Hao-Yi Tsai, Yu-Wen Liu
  • Patent number: 8981580
    Abstract: A bonding pad structure is provided that includes two conductive layers and a connective layer interposing the two conductive layers. The connective layer includes a contiguous, conductive structure. In an embodiment, the contiguous conductive structure is a solid layer of conductive material. In other embodiments, the contiguous conductive structure is a conductive network including, for example, a matrix configuration or a plurality of conductive stripes. At least one dielectric spacer may interpose the conductive network. Conductive plugs may interconnect a bond pad and one of the conductive layers.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Yu-Wen Liu, Hao-Yi Tsai, Hsien-Wei Chen
  • Publication number: 20150031200
    Abstract: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad.
    Type: Application
    Filed: October 13, 2014
    Publication date: January 29, 2015
    Inventors: Hao-Yi Tsai, Hsien-Wei Chen, Yu-Wen Liu, Ying-Ju Chen, Hsiu-Ping Wei
  • Patent number: 8907478
    Abstract: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: December 9, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Hsien-Wei Chen, Yu-Wen Liu, Ying-Ju Chen, Hsiu-Ping Wei
  • Patent number: 8860208
    Abstract: An integrated circuit structure includes a first chip including a first edge; and a second chip having a second edge facing the first edge. A scribe line is between and adjoining the first edge and the second edge. A heat spreader includes a portion in the scribe line, wherein the heat spreader includes a plurality of vias and a plurality of metal lines. The portion of the heat spreader in the scribe line has a second length at least close to, or greater than, a first length of the first edge.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: October 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Yu-Wen Liu, Jyh-Cherng Sheu, Hao-Yi Tsai, Shin-Puu Jeng, Chen-Hua Yu, Shang-Yun Hou