Patents by Inventor Yu-Wen Tsai
Yu-Wen Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9897142Abstract: A linear slide includes: a rail; a slide block, which is mounted on the rail and is movable relative to the rail; a plurality of rolling elements, which are arranged between the rail and the slide block; two end caps, which are respectively mounted to two ends of the slide block, the end caps each comprising a mounting trough formed therein to correspond to and face the rail, the mounting trough having a wall; and two dust protection plates, each of which is arranged in each of the mounting troughs, each of the dust protection plates comprising a main body and two elastic sections projecting from two opposite sides of the main body such that one of the elastic sections is in contact engagement with the wall and the other one of the elastic sections is engageable with a surface of the rail.Type: GrantFiled: February 9, 2017Date of Patent: February 20, 2018Assignee: HIWIN TECHNOLOGIES CORPInventors: Yu-Wen Tsai, Sheng-Hsiang Huang
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Publication number: 20170049004Abstract: Disclosed is a heat dissipation device with a charging function, which includes a housing, which includes at least one heat dissipation element arranged therein. The housing has one end to which at least one elastic element and at least one first connector are mounted in such a way that a guiding opening is arranged between the elastic element and the first connector. The housing has an opposite end to which at least one second connector is mounted. The housing includes at least one air outlet opening formed in a predetermined location thereof. The housing has a surface on which a switch is mounted. The first connector, the second connector, and the heat dissipation element are in electrical connection with each other. The heat dissipation element is electrically connected to the switch. With such an arrangement, an effect of charging and dissipation heat at the same time can be achieved.Type: ApplicationFiled: August 10, 2015Publication date: February 16, 2017Inventor: Yu-Wen Tsai
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Patent number: 7707521Abstract: A layout architecture having high-performance and high-density design used in a standard cell integrated circuit is provided. The layout architecture includes a substrate, a first conductor, a second conductor, a third conductor, a fourth conductor, a first device region, a second device region, a third device region and a forth device region. The first device region is arranged adjacent to the first conductor on the substrate. The second device region is arranged adjacent to the first device region on the substrate and is arranged beneath the second conductor. The third device region is arranged adjacent to the second device region on the substrate and is arranged beneath the third conductor. The fourth device region is arranged between the third device region and the fourth conductor on the substrate.Type: GrantFiled: November 17, 2006Date of Patent: April 27, 2010Assignee: Faraday Technology Corp.Inventors: Yu-Wen Tsai, Jeng-Huang Wu
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Publication number: 20100019774Abstract: An isolation cell having a test mode, connected between a first block and a second block, wherein the first block can operate in either a power-up mode or a power-down mode, comprises: an input terminal for receiving an input signal that is derived from the first block; an output terminal for outputting an output signal to the second block; a normal-sleep terminal for determining the isolation cell is operated in the power-up mode or in the power-down mode, and the logic level of the normal-sleep terminal is determined by the operation mode of the first block; and, a DFT-sleep terminal is for overwriting the logic level of the normal-sleep terminal when the isolation cell is in the test mode.Type: ApplicationFiled: July 24, 2008Publication date: January 28, 2010Applicant: FARADAY TECHNOLOGY CORPORATIONInventors: Cheng-Chi WU, Yu-Wen TSAI, Shang-Chih HSIEH, Chun-Sung SU
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Patent number: 7473033Abstract: A ball circulation system for linear guide way includes a slide rail, a slider coupled with the slide rail, and two end covers of the slider with an oil scraper. A cross-wise circulation passage and a separated circulation passage respectively formed at two side of the end cover are integrally combined in one structure so as to form two independent and opposite ball circulations. By so space in the circulation system is able to accommodate more rolling balls by twice filling procedure thereby improving the efficiency of assembly work. Besides, up and down motion of the rolling balls during circulation causes a uniform lubrication effect. Allowing accommodation of more rolling balls means substantially improving load carrying ability of the linear guide way.Type: GrantFiled: April 7, 2006Date of Patent: January 6, 2009Assignee: Hiwin Technology Corp.Inventors: Jen-Sheng Chen, Yu-Wen Tsai
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Patent number: 7465970Abstract: A semiconductor layout includes a p substrate, a first semiconductor cell formed over the p substrate, and a second semiconductor cell formed over the p substrate adjacent to the first semiconductor cell. A total height of the first semiconductor cell and the second semiconductor cell is twice a height of a standard semiconductor cell, and the height of the second semiconductor cell is adjusted according to the height of the first semiconductor cell.Type: GrantFiled: May 10, 2006Date of Patent: December 16, 2008Assignee: Faraday Technology Corp.Inventors: Jeng-Huang Wu, Chiung-Yu Feng, Chien-Chih Huang, Yu-Wen Tsai
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Publication number: 20080232728Abstract: A linear motion guide device includes a slider and two end caps attached to side portions of the slider, one or more guide beams attached to the slider and engaged between the end caps for retaining a ball bearing device to the slider, and one or more retaining devices attached to the end caps and engaged with the guide beam for attaching the guide beam to the slider without fasteners or tools, one of the end caps includes a latch device for engaging with one end of the retaining device and for securing the retaining device to the end cap, and the retaining device may include one or more protrusions for engaging with the other end cap.Type: ApplicationFiled: March 20, 2007Publication date: September 25, 2008Inventors: Tsung Jen Chen, Yu Wen Tsai
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Patent number: 7394241Abstract: A method for testing power switches using a logic gate tree, the method includes providing a logic gate tree electrically connected to a plurality of power switches, each output node of the plurality of power switches being electrically connected to a corresponding input node of a logic gate of the logic gate tree; applying a pattern of control signals to the plurality of power switches for controlling on-off states of the plurality of power switches; and determining whether an output voltage signal of an output node of the logic gate tree matches a predetermined value corresponding to the pattern of control signals.Type: GrantFiled: April 26, 2006Date of Patent: July 1, 2008Assignee: Faraday Technology Corp.Inventor: Yu-Wen Tsai
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Patent number: 7380988Abstract: A linear motion guide device includes a slide having a housing, and two end caps secured to sides of the housing and each including a space aligned with a chamber of the housing, for slidably receiving an elongate track rail. One or more dust shields each includes one end detachably anchored to one of the end caps with such as one or more catches, and the other end detachably anchored to the other end cap with such as one or more latches or fingers, for detachably securing the dust shield to the end caps and the housing without additional fasteners. The end caps and the housing each includes a recess for receiving and seating the dust shield.Type: GrantFiled: November 15, 2005Date of Patent: June 3, 2008Assignee: Hiwin Technologies Corp.Inventors: Scotte Chen, Yu Wen Tsai
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Publication number: 20080118193Abstract: A roller circulating device for a linear guideway is formed with a plurality of grooves for enabling a plurality of rollers to circulate therein. The roller circulating device is characterized in that: the respective return paths are connected to the forward path through a tapered surface. And along a direction of a radial surface of the respective rollers, the tapered surface is tapered from the respective return paths to the forward path, thus preventing the rollers from tilting and being jammed, so that the rollers can circulate smoothly.Type: ApplicationFiled: November 21, 2006Publication date: May 22, 2008Inventors: Tsung-Jen CHEN, Yu-Wen Tsai
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Publication number: 20080022245Abstract: A layout architecture having high-performance and high-density design used in a standard cell integrated circuit is provided. The layout architecture includes a substrate, a first conductor, a second conductor, a third conductor, a fourth conductor, a first device region, a second device region, a third device region and a forth device region. The first device region is arranged adjacent to the first conductor on the substrate. The second device region is arranged adjacent to the first device region on the substrate and is arranged beneath the second conductor. The third device region is arranged adjacent to the second device region on the substrate and is arranged beneath the third conductor. The forth device region is arranged between the third device region and the forth conductor on the substrate.Type: ApplicationFiled: November 17, 2006Publication date: January 24, 2008Applicant: FARADAY TECHNOLOGY CORP.Inventors: Yu-Wen Tsai, Jeng-Huang Wu
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Publication number: 20070272947Abstract: A low power consuming semiconductor device comprises a p substrate, a first semiconductor cell formed over the p substrate, a second semiconductor cell formed over the p substrate adjacent to the first semiconductor cell, and a tap cell for coupling a power pin to n-well structures of the first semiconductor cell and the second semiconductor cell, and for coupling a ground pin to the p substrate. A total height of the first semiconductor cell and the second semiconductor cell is twice a height of a standard semiconductor cell, and the height of the second semiconductor cell is adjusted according to the height of the first semiconductor cell.Type: ApplicationFiled: May 10, 2006Publication date: November 29, 2007Inventors: Jeng-Huang Wu, Shang-Chih Hsieh, Yu-Wen Tsai
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Publication number: 20070262349Abstract: A semiconductor layout includes a p substrate, a first semiconductor cell formed over the p substrate, and a second semiconductor cell formed over the p substrate adjacent to the first semiconductor cell. A total height of the first semiconductor cell and the second semiconductor cell is twice a height of a standard semiconductor cell, and the height of the second semiconductor cell is adjusted according to the height of the first semiconductor cell.Type: ApplicationFiled: May 10, 2006Publication date: November 15, 2007Inventors: Jeng-Huang Wu, Chiung-Yu Feng, Chien-Chih Huang, Yu-Wen Tsai
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Publication number: 20070252581Abstract: A method for testing power switches using a logic gate tree, the method comprises providing a logic gate tree electrically connected to a plurality of power switches, each output node of the plurality of power switches being electrically connected to a corresponding input node of a logic gate of the logic gate tree; applying a pattern of control signals to the plurality of power switches for controlling on-off states of the plurality of power switches; and determining whether an output voltage signal of an output node of the logic gate tree matches a predetermined value corresponding to the pattern of control signals.Type: ApplicationFiled: April 26, 2006Publication date: November 1, 2007Inventor: Yu-Wen Tsai
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Publication number: 20070237436Abstract: A ball circulation system for linear guide way includes a slide rail, a slider coupled with the slide rail, and two end covers of the slider with an oil scraper. A cross-wise circulation passage and a separated circulation passage respectively formed at two side of the end cover are integrally combined in one structure so as to form two independent and opposite ball circulations. By so space in the circulation system is able to accommodate more rolling balls by twice filling procedure thereby improving the efficiency of assembly work. Besides, up and down motion of the rolling balls during circulation causes a uniform lubrication effect. Allowing accommodation of more rolling balls means substantially improving load carrying ability of the linear guide way.Type: ApplicationFiled: April 7, 2006Publication date: October 11, 2007Inventors: Jen-Sheng Chen, Yu-Wen Tsai
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Patent number: 7253662Abstract: A method for forming an electric device having power switches around a logic circuit including: forming a logic circuit on a substrate; forming a plurality of power switches around the logic circuit; and coupling first ends of the power switches to a voltage end, and coupling second ends of the power switches to a power receiver of the logic circuit.Type: GrantFiled: April 22, 2005Date of Patent: August 7, 2007Assignee: Faraday Technology Corp.Inventors: Yu-Wen Tsai, Cheng-I Huang
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Publication number: 20060237834Abstract: A method for forming an electric device having power switches around a logic circuit including: forming a logic circuit on a substrate; forming a plurality of power switches around the logic circuit; and coupling first ends of the power switches to a voltage end, and coupling second ends of the power switches to a power receiver of the logic circuit.Type: ApplicationFiled: April 22, 2005Publication date: October 26, 2006Inventors: Yu-Wen Tsai, Cheng-I Huang
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Patent number: 7033883Abstract: A method for placing decoupling capacitors in an integrated circuit during placement and routing stage. In the placement method, a floor plan of the integrated circuit is created, and includes the relative locations of a plurality of functional units. A power mesh comprising a plurality power lines is then overlaid on the floor plan, and the floor plan is divided into a plurality of windows. A plurality of semiconductor cells are placed into a portion of the windows. It is then determined whether a residual area comprising two adjacent windows without functional units and semiconductor cells disposed therein and at least three parallel power lines running theretrough exists. A MOS capacitor is then placed in the detected residual area, serving as a decoupling capacitor.Type: GrantFiled: June 4, 2004Date of Patent: April 25, 2006Assignee: Faraday Technology Corp.Inventors: Chien-Chia Huang, Yu-Wen Tsai
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Patent number: 7034384Abstract: An integrated circuit adapted for ECO and FIB debug comprises: a substrate, a spare cell, a top-layer output terminal pad and a top-layer output terminal pad. The spare cell is disposed in substrate and comprises at least one input terminal and at least one output terminal. The top-layer output terminal pad and the top-layer input terminal pad are disposed in a top metal layer. The top metal layer is disposed over the substrate. The top-layer output terminal pad and the top-layer input terminal pad are electrically coupled to the output terminal and input terminal of the spare cell by a via structure, respectively.Type: GrantFiled: April 13, 2004Date of Patent: April 25, 2006Assignee: Faraday Technology Corp.Inventor: Yu-Wen Tsai
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Publication number: 20060015835Abstract: A method for placing decoupling capacitors in an integrated circuit during placement and routing stage. In the placement method, a floor plan of the integrated circuit is created, and includes the relative locations of a plurality of functional units. A power mesh comprising a plurality power lines is then overlaid on the floor plan, and the floor plan is divided into a plurality of windows. A plurality of semiconductor cells are placed into a portion of the windows. It is then determined whether a residual area comprising two adjacent windows without functional units and semiconductor cells disposed therein and at least three parallel power lines running theretrough exists. A MOS capacitor is then placed in the detected residual area, serving as a decoupling capacitor.Type: ApplicationFiled: September 23, 2005Publication date: January 19, 2006Inventors: Chien-Chia Huang, Yu-Wen Tsai