Patents by Inventor Yu-Wu Wang
Yu-Wu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050275338Abstract: A field emission display (FED) having a grid plate with spacer structure and fabrication method thereof. A first plate having first electrodes and electron emitters on a first surface is provided. A second plate having second electrodes and phosphor regions on a second surface is also provided, wherein the second surface is opposite the first surface. A grid plate with spacer structure and passages having grid electrodes is positioned between the two plates to maintain a predetermined interval. When a specific voltage is applied between the first electrode and the second electrode, electrons extracted from the electron emitters are accelerated by the grid electrodes through the passages to impact the phosphor regions.Type: ApplicationFiled: August 22, 2005Publication date: December 15, 2005Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chun-Tao Lee, Ming-Chun Hsiao, Wei-Yi Lin, Yu-Yang Chang, Yu-Wu Wang
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Patent number: 6958492Abstract: A thin film transistor structure for a field emission display is disclosed, which has a substrate; a patterned poly-silicon layer having a source area, a drain area, and a channel on the substrate; a patterned first gate metal layer; a first gate-insulating layer sandwiched in between the poly-silicon layer and the first gate metal layer; a patterned second gate metal layer; and a second gate-insulating layer sandwiched in between the poly-silicon layer and the second gate metal layer; wherein the thickness of the second insulating layer is greater than that of the first gate-insulating layer, and the absolute voltage in the channel under the first gate metal layer is less than that under the second gate metal layer when a voltage higher than the threshold voltage thereof is applied to both of the first gate metal layer and the second gate metal layer.Type: GrantFiled: December 15, 2003Date of Patent: October 25, 2005Assignee: Industrial Technology Research InstituteInventors: Chun-Yao Huang, Cheng-Chung Chen, Yu-Wu Wang, Chen-Ming Chen, Huai-Yuan Tseng
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Publication number: 20050197032Abstract: A triode structure of a field emission display and fabrication method thereof. A plurality of cathode layers arranged in a matrix is formed overlying a dielectric layer. A plurality of emitting layers arranged in a matrix is formed overlying the cathode layers, respectively. A plurality of lengthwise-extending gate lines is formed on the dielectric layer, in which each of the gate layers is disposed between two adjacent columns of the cathode layers.Type: ApplicationFiled: April 19, 2005Publication date: September 8, 2005Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chun-Tao Lee, Cheng-Chung Lee, Jyh-Rong Sheu, Yu-Yang Chang, Jia-Chong Ho, Yu-Wu Wang
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Patent number: 6924503Abstract: An organic integrated device for thin film transistor and light emitting diode. The organic integrated device of the present invention includes a top-gate organic thin film transistor (top-gate OTFT) and an organic light emitting diode (OLED), both formed on the same substrate. In the organic integrated device, some layers can be commonly used by both OTFT and OLED, and some layers can be made of the same material and formed in the same course, which simplifies the entire process.Type: GrantFiled: January 13, 2003Date of Patent: August 2, 2005Assignee: Industrial Technology Research InstituteInventors: Horng-Long Cheng, Yu-Wu Wang, Ching-Hsun Chao, Cheng-Chung Lee, Chai-Yuan Sheu
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Publication number: 20050087745Abstract: The invention provides an organic thin film transistor array substrate, comprising: a substrate, having a liquid crystal display area and an organic thin film transistor area; a pixel electrode, formed on the substrate in the LCD area; a first alignment film, formed on the pixel electrode; a second alignment film, formed on the substrate in the OTFT area; an organic semiconductor layer, formed on the second alignment film, wherein the organic semiconductor layer is aligned along the direction of the second alignment film; and a gate, a source and a drain, formed in the OTFT area, wherein the source and the drain are in contact with the organic semiconductor layer and a channel is formed between the source and the drain.Type: ApplicationFiled: November 16, 2004Publication date: April 28, 2005Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Horng-Long Cheng, Wei-Yang Chou, Yih-Jun Wong, Yu-Wu Wang, Cheng-Chung Lee
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Patent number: 6882112Abstract: A nanotube field emission display. The nanotube field emission display includes a nanotube field emission cell, an active device, and a capacitor. The nanotube field emission cell includes a cathode, a gate, and an anode, wherein the cathode has nanotubes for field emission where the gate is used. The active device includes a first electrode, a second electrode, and a control electrode, wherein the second electrode is coupled to the gate of the nanotube field emission cell. The capacitor is coupled between the gate of the nanotube field emission cell and a voltage source to store gate voltage to control illumination and gray level of the nanotube field emission cell.Type: GrantFiled: April 29, 2003Date of Patent: April 19, 2005Assignee: Industrial Technology Research InstituteInventors: Yu-Wu Wang, Chun-Tao Lee, Cheng-Chung Lee
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Patent number: 6872980Abstract: The invention provides an organic thin film transistor array substrate, comprising: a substrate, having a liquid crystal display area and an organic thin film transistor area; a pixel electrode, formed on the substrate in the LCD area; a first alignment film, formed on the pixel electrode; a second alignment film, formed on the substrate in the OTFT area; an organic semiconductor layer, formed on the second alignment film, wherein the organic semiconductor layer is aligned along the direction of the second alignment film; and a gate, a source and a drain, formed in the OTFT area, wherein the source and the drain are in contact with the organic semiconductor layer and a channel is formed between the source and the drain.Type: GrantFiled: August 8, 2003Date of Patent: March 29, 2005Assignee: Industrial Technology Research InstituteInventors: Horng-Long Cheng, Wei-Yang Chou, Yih-Jun Wong, Yu-Wu Wang, Cheng-Chung Lee
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Publication number: 20050062040Abstract: An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.Type: ApplicationFiled: November 5, 2004Publication date: March 24, 2005Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yih-Jun Wong, Horng-Long Cheng, Yu-Wu Wang
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Publication number: 20050062134Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.Type: ApplicationFiled: December 9, 2003Publication date: March 24, 2005Applicant: Industrial Technology Research InstituteInventors: Jia-Chong Ho, Jen-Hao Lee, Cheng-Chung Lee, Yu-Wu Wang, Chun-Tao Lee, Pang Lin
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Publication number: 20050056846Abstract: A thin film transistor structure for a field emission display is disclosed, which has a substrate; a patterned poly-silicon layer having a source area, a drain area, and a channel on the substrate; a patterned first gate metal layer; a first gate-insulating layer sandwiched in between the poly-silicon layer and the first gate metal layer; a patterned second gate metal layer; and a second gate-insulating layer sandwiched in between the poly-silicon layer and the second gate metal layer; wherein the thickness of the second insulating layer is greater than that of the first gate-insulating layer, and the absolute voltage in the channel under the first gate metal layer is less than that under the second gate metal layer when a voltage higher than the threshold voltage thereof is applied to both of the first gate metal layer and the second gate metal layer.Type: ApplicationFiled: December 15, 2003Publication date: March 17, 2005Applicant: Industrial Technology Research InstituteInventors: Chun-Yao Huang, Cheng-Chung Chen, Yu-Wu Wang, Chen-Ming Chen, Huai-Yuan Tseng
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Publication number: 20040222732Abstract: A field emission display (FED) having a grid plate with spacer structure and fabrication method thereof. A first plate having first electrodes and electron emitters on a first surface is provided. A second plate having second electrodes and phosphor regions on a second surface is also provided, wherein the second surface is opposite the first surface. A grid plate with spacer structure and passages having grid electrodes is positioned between the two plates to maintain a predetermined interval. When a specific voltage is applied between the first electrode and the second electrode, electrons extracted from the electron emitters are accelerated by the grid electrodes through the passages to impact the phosphor regions.Type: ApplicationFiled: October 14, 2003Publication date: November 11, 2004Inventors: Chun-Tao Lee, Ming-Chun Hsiao, Wei-Yi Lin, Yu-Yang Chang, Yu-Wu Wang
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Publication number: 20040209388Abstract: The invention provides an organic thin film transistor array substrate, comprising: a substrate, having a liquid crystal display area and an organic thin film transistor area; a pixel electrode, formed on the substrate in the LCD area; a first alignment film, formed on the pixel electrode; a second alignment film, formed on the substrate in the OTFT area; an organic semiconductor layer, formed on the second alignment film, wherein the organic semiconductor layer is aligned along the direction of the second alignment film; and a gate, a source and a drain, formed in the OTFT area, wherein the source and the drain are in contact with the organic semiconductor layer and a channel is formed between the source and the drain.Type: ApplicationFiled: August 8, 2003Publication date: October 21, 2004Applicant: Industrial Technology Reasearch InstituteInventors: Horng-Long Cheng, Wei-Yang Chou, Yih-Jun Wong, Yu-Wu Wang, Cheng-Chung Lee
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Publication number: 20040150761Abstract: An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.Type: ApplicationFiled: June 10, 2003Publication date: August 5, 2004Applicant: Industrial Technology Research InstituteInventors: Yih-Jun Wong, Horng-Long Cheng, Yu-Wu Wang
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Publication number: 20040104668Abstract: A triode structure of a field emission display and fabrication method thereof. A plurality of cathode layers arranged in a matrix is formed overlying a dielectric layer. A plurality of emitting layers arranged in a matrix is formed overlying the cathode layers, respectively. A plurality of lengthwise-extending gate lines is formed on the dielectric layer, in which each of the gate layers is disposed between two adjacent columns of the cathode layers.Type: ApplicationFiled: May 13, 2003Publication date: June 3, 2004Applicant: Industrial Technology Research InstituteInventors: Chun-Tao Lee, Cheng-Chung Lee, Jyh-Rong Sheu, Yu-Yang Chang, Jia-Chong Ho, Yu-Wu Wang
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Patent number: 6737303Abstract: A process for forming an organic semiconducting layer having molecular alignment. First, a photoalignment organic layer is formed on a substrate or A dielectric layer. Next, the photoalignment organic layer is irradiated by polarized light through a mask, such that the photoalignment organic layer becomes an orientation layer having molecular alignment. Finally, an organic semiconducting layer is formed on the orientation layer, such that the organic semiconducting layer aligns according to the alignment of the orientation layer to exhibit molecular alignment. The present invention can form an organic semiconducting layer with different molecular alignments in different regions over the same substrate by means of polarized light exposure through a mask.Type: GrantFiled: November 22, 2002Date of Patent: May 18, 2004Assignee: Industrial Technology Research InstituteInventors: Horng-Long Cheng, Wei-Yang Chou, Chai-Yuan Sheu, Yu-Wu Wang, Jia-Chong Ho, Chi-Chang Liao
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Publication number: 20040051468Abstract: A nanotube field emission display. The nanotube field emission display includes a nanotube field emission cell, an active device, and a capacitor. The nanotube field emission cell includes a cathode, a gate, and an anode, wherein the cathode has nanotubes for field emission where the gate is used. The active device includes a first electrode, a second electrode, and a control electrode, wherein the second electrode is coupled to the gate of the nanotube field emission cell.Type: ApplicationFiled: April 29, 2003Publication date: March 18, 2004Inventors: Yu-Wu Wang, Chun-Tao Lee, Cheng-Chung Lee
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Publication number: 20040041146Abstract: An organic integrated device for thin film transistor and light emitting diode. The organic integrated device of the present invention includes a top-gate organic thin film transistor (top-gate OTFT) and an organic light emitting diode (OLED), both formed on the same substrate. In the organic integrated device, some layers can be commonly used by both OTFT and OLED, and some layers can be made of the same material and formed in the same course, which simplifies the entire process.Type: ApplicationFiled: January 13, 2003Publication date: March 4, 2004Inventors: Horng-Long Cheng, Yu-Wu Wang, Ching-Hsun Chao, Cheng-Chung Lee, Chai-Yuan Sheu
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Publication number: 20040043531Abstract: A process for forming an organic semiconducting layer having molecular alignment. First, a photoalignment organic layer is formed on a substrate or a dielectric layer. Next, the photoalignment organic layer is irradiated by polarized light through a mask, such that the photoalignment organic layer becomes an orientation layer having molecular alignment. Finally, an organic semiconducting layer is formed on the orientation layer, such that the organic semiconducting layer aligns according to the alignment of the orientation layer to exhibit molecular alignment. The present invention can form an organic semiconducting layer with different molecular alignments in different regions over the same substrate by means of polarized light exposure through a mask.Type: ApplicationFiled: November 22, 2002Publication date: March 4, 2004Inventors: Horng-Long Cheng, Wei-Yang Chou, Chai-Yuan Sheu, Yu-Wu Wang, Jia-Chong Ho, Chi-Chang Liao
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Publication number: 20030205768Abstract: An active matrix current source controlled gray level tunable FED. The inventive FED uses active devices to convert a voltage-controlled signal into an output current and a capacitor to record and hold the voltage-controlled signal, thereby producing a low control voltage and active current source driving FED. As such, adjustment and maintenance of the gray level brightness of the FED is achieved because the brightness fixed by the active devices and the capacitor can obtain a high transient brightness when the FED operates in a lower voltage and brightness, thereby producing a high average brightness and avoiding an arc from high-voltage operation or poor vacuum.Type: ApplicationFiled: April 14, 2003Publication date: November 6, 2003Inventors: Yu-Wu Wang, Chun-Tao Lee, Cheng-Chung Lee