Patents by Inventor Yu-Yao Lin

Yu-Yao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250072108
    Abstract: Capacitor cells are provided. A first PMOS transistor has a source connected to a power supply and a drain connected to a first node. A first NMOS transistor has a source connected to a ground and a drain connected to a second node. A second PMOS transistor has a source connected to the second node and a drain connected to the first node. A second NMOS transistor has a source connected to the ground and a drain connected to the first node. A first P+ doped region is shared by drains of the first and second PMOS transistors. A first gate metal is between the first P+ doped region and a second P+ doped region. A first N+ doped region is shared by sources of the first and second NMOS transistors. A second gate metal is between the first N+ doped region and a second N+ doped region.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Inventors: Chien-Yao HUANG, Wun-Jie LIN, Chia-Wei HSU, Yu-Ti SU
  • Publication number: 20250053821
    Abstract: An auto-regressive method for a large language model includes receiving a hidden state associated with at least one token, generating key data, first value data, and query data according to a received hidden state, generating first positionally encoded key data by encoding the key data positionally, generating positionally encoded query data by encoding the query data positionally, performing first element-wise dot product operations according to the first positionally encoded key data, the positionally encoded query data, and second positionally encoded key data to generate an attention score, performing second element-wise dot product operations according to the first value data, the attention score, and second value data to generate an attention output, and adding the attention output and the hidden state to generate an updated hidden output.
    Type: Application
    Filed: July 11, 2024
    Publication date: February 13, 2025
    Applicant: MediaTek Singapore Pte. Ltd.
    Inventors: Jia Yao Christopher LIM, Kelvin Kae Wen TEH, Po-Yen LIN, Jung Hau FOO, Chia-Wei HSU, Yu-Lung LU, Hung-Jen CHEN, Chung-Li LU, Wai Mun WONG
  • Patent number: 12218023
    Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240312369
    Abstract: A metalens, a metalens set, and a method of image construction or decryption are disclosed. The metalens includes metastructures each having a shape and a height related to a resonant light wavelength of the metastructure, so that the metalens can present an incident light of the resonant light wavelength as a light shape or light pattern at a far-field position matching the resonant light wavelength. A metalens set formed by staking the metalenses vertically can present incident lights having different resonant wavelengths as light shapes, light patterns, or resolved images at far-field positions matching the resonant wavelengths. Image construction or decryption are achieved by combining resolved images of the resonant light wavelengths with non-resolved images of non-resonant light wavelengths so as to compose an overlay image, which is to be decomposed by the metalens or the metalens set so as to recover the resolved images.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Inventors: Vin-Cent Su, Ching-Hsueh Chiu, Yu-Yao Lin, Chi-Feng Chen, Cheng-Eng Jeng
  • Patent number: 10559717
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, w
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: February 11, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
  • Publication number: 20190103515
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, w
    Type: Application
    Filed: November 13, 2018
    Publication date: April 4, 2019
    Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
  • Patent number: 10153398
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firs
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: December 11, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
  • Publication number: 20180130924
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firs
    Type: Application
    Filed: November 1, 2017
    Publication date: May 10, 2018
    Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, YEN-LIANG KUO, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, YU-YAO LIN
  • Patent number: 9525104
    Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN (0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: December 20, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Yu-Yao Lin, Tsun-Kai Ko, Chien-Yuan Tseng, Yen-Chih Chen, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
  • Patent number: 9087946
    Abstract: A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: July 21, 2015
    Assignee: Epistar Corporation
    Inventors: Yu-Yao Lin, Yen-Chih Chen, Chien-Yuan Tseng, Tsun-Kai Ko, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
  • Publication number: 20140217358
    Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN(0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.
    Type: Application
    Filed: January 23, 2014
    Publication date: August 7, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Yu-Yao LIN, Tsun-Kai KO, Chien-Yuan TSENG, Yen-Chih CHEN, Chun-Ta YU, Shih-Chun LING, Cheng-Hsiung YEN, Hsin-Hsien WU
  • Publication number: 20140167097
    Abstract: A method of fabricating an optoelectronic device comprising, providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface; forming a semiconductor epitaxial stack on the first major surface including a first conductive-type semiconductor layer having a first doping concentration, an active layer, and a second conductive-type semiconductor layer wherein the semiconductor epitaxial stack having four boundaries and a geometric center; and forming a plurality of the hollow components in the first conductive-type semiconductor layer wherein the plurality of the hollow components is formed from the boundary of the semiconductor epitaxial stack to the geometric center of the semiconductor epitaxial stack.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 19, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: HSIN-HSIEN WU, YU-YAO LIN, YEN-CHIH CHEN, CHIEN-YUAN TSENG, CHUN-TA YU, CHENG-HSIUNG YEN, SHIH-CHUN LING, TSUN-KAI KO, DE-SHAN KUO
  • Patent number: 8754439
    Abstract: A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: June 17, 2014
    Assignee: Epistar Corporation
    Inventors: Jui Hung Yeh, Chun Kai Wang, Wei Yu Yen, Yu Yao Lin, Chien Fu Shen, De Shan Kuo, Ting Chia Ko
  • Publication number: 20140117306
    Abstract: A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 1, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: YU-YAO LIN, Yen-Chih Chen, Chien-Yuan Tseng, Tsun-Kai Ko, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
  • Publication number: 20130320296
    Abstract: A light-emitting device comprises a semiconductor stacked structure, the semiconductor stacked structure comprising a p-type semiconductor layer, a n-type semiconductor layer and an multiple quantum well structure between the p-type semiconductor layer and the n-type semiconductor layer, wherein the multiple quantum well structure comprises a first multiple quantum well structure near the n-type semiconductor layer and a second multiple quantum well structure near the p-type semiconductor layer, wherein the first multiple quantum well structure has positive interface bound charge and the second multiple quantum well structure has zero interface bound charge.
    Type: Application
    Filed: June 5, 2012
    Publication date: December 5, 2013
    Applicant: Epistar Corporation
    Inventors: Chun-Ta Yu, Chien-Yuan Tseng, Yu-Yao Lin, Shih-Pang Chang, Hung-Chih Yang
  • Patent number: 8344392
    Abstract: A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: January 1, 2013
    Assignee: Epistar Corporation
    Inventors: Jui Hung Yeh, Chun Kai Wang, Wei Yu Yen, Yu Yao Lin, Chien Fu Shen, De Shan Kuo, Ting Chia Ko
  • Publication number: 20120286317
    Abstract: A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion.
    Type: Application
    Filed: May 12, 2011
    Publication date: November 15, 2012
    Inventors: Jui Hung Yeh, Chun Kai Wang, Wei Yu Yen, Yu Yao Lin, Chien Fu Shen, De Shan Kuo, Ting Chia Ko
  • Patent number: 7021713
    Abstract: A seat elevating mechanism for chair particularly designed for old men and patients having weak legs mainly includes a seat that can be elevated or lowered using a power-actuated telescopic lifter. The seat is maintained in a horizontal position while being elevated or lowered, so that a user may stably sit thereon until the seat is fully elevated or lowered to enable the user to get up or sit down effortlessly.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: April 4, 2006
    Assignee: Dynamic Healthtech Inc
    Inventors: Chin-Chin Kao, Yu-Yao Lin
  • Publication number: 20050264070
    Abstract: An electric erecting chair includes a support member, a backrest, a pair of arms, a cushion and an electric erecting mechanism The support member has a first connecting structure at each side thereof and a second connecting structure at the rear end of each side. The backrest has a connecting structure detachably connected to the second connecting structure of the support member. The pair of arms is detachably connected to the first connecting structure. The cushion is disposed on the support member and the electric erecting mechanism disposed under cushion the operative to push a front portion of the cushion upwardly.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 1, 2005
    Inventors: Chin-Chin Kao, Yu-Yao Lin
  • Patent number: D879070
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: March 24, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chia-Yuan Chang, Jung-Wen Chang, Yu-Yao Lin