Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: A semiconductor device includes a package structure, a first heat spreader, and a second heat spreader. The first heat spreader is aside the package structure. The second heat spreader is in physical contact with the first heat spreader. The second heat spreader covers a top surface and sidewalls of the package structure. A material of the first heat spreader is different from a material of the second heat spreader.

Abstract: An information handling system includes a printed circuit board, a screw, and a processor. The printed circuit board includes a through hole via. The through hole via includes top and bottom sections plated with a conductive plating material, and a middle section without any conductive plating material. The screw in physical communication with the top, middle, and bottom sections of the through hole via in the printed circuit board. The processor determines whether an electrical circuit is formed between the screw, the top section of the through hole via, and the bottom section of the through hole via. Based on the determination of the electrical circuit being formed, the processor provides an indication that no intrusion has been made into the information handling system.

Abstract: A semiconductor device includes a gate structure extending along a first lateral direction. The semiconductor device includes a source/drain structure disposed on one side of the gate structure along a second lateral direction, the second lateral direction perpendicular to the first lateral direction. The semiconductor device includes an air gap disposed between the gate structure and the source/drain structure along the second lateral direction, wherein the air gap is disposed over the source/drain structure.

Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.

Abstract: A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.

Abstract: Provided herein are tetravalent antibodies that specifically bind to human PSGL-1. Unlike bivalent antibodies, these tetravalent antibodies contain a dimer of two monomers, with each monomer comprising two light chain variable (VL) domains and two heavy chain variable (VH) domains. This format allows for cross-linker/FcR-expressing cell-independent tetravalent antibodies against PSGL-1 that show enhanced efficacy as compared to bivalent PSGL-1 antibodies. These tetravalent antibodies can be used in a variety of diagnostic and therapeutic methods, including without limitation treating T-cell mediated inflammatory diseases, transplantations, and transfusions.

Abstract: An exercise intensity assessing system includes a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser exercises. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database for being diagnosed and analyzed by a fitness instructor. The cloud database obtains a forecasted watt value corresponding to the physiological information, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.

Abstract: An intelligent exercise intensity assessing system includes an exercise testing machine, a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser operates the exercise testing machine. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database. The cloud database analyzes the physiological information to obtain a corresponding forecasted watt value, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: A semiconductor device includes a substrate, a package structure, a first heat spreader, and a second heat spreader. The package structure is disposed on the substrate. The first heat spreader is disposed on the substrate. The first heat spreader surrounds the package structure. The second heat spreader is disposed on the package structure. The second heat spreader is connected to the first heat spreader. A material of the first heat spreader is different from a material of the second heat spreader.

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, w

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, w

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firs

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firs

Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN (0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.

Abstract: A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.

Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN(0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.