Patents by Inventor Yu-Ying Huang

Yu-Ying Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mark segmentation method and method for manufacturing a semiconductor structure applying the same
    Patent number: 9373505
    Abstract: In this disclosure, a mark segmentation method and a method for manufacturing a semiconductor structure applying the same are provided. The mark segmentation method comprises the following steps. First, a plurality of segments having a width WS and separated from each other by a space SS formed on a substrate are identified by a processor. Thereafter, a plurality of marks are set over the segments by the processor. This step comprises: (1) adjusting a width WM of each one of the marks being equal to m(WS+SS)+WS or m(WS+SS)+SS by the processor, wherein m is an integer; and (2) adjusting a space SM of adjacent two of the marks by the processor such that WM+SM=n(WS+SS), wherein n is an integer.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: June 21, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Yu-Ying Huang, Jen-Hsiu Li, Mei-Chen Chen, Ya-Ling Chen, Yi-Jing Wang, Chi-Ming Huang
  • MARK SEGMENTATION METHOD AND METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE APPLYING THE SAME
    Publication number: 20150294058
    Abstract: In this disclosure, a mark segmentation method and a method for manufacturing a semiconductor structure applying the same are provided. The mark segmentation method comprises the following steps. First, a plurality of segments having a width WS and separated from each other by a space SS formed on a substrate are identified by a processor. Thereafter, a plurality of marks are set over the segments by the processor. This step comprises: (1) adjusting a width WM of each one of the marks being equal to m(WS+SS)+WS or m(WS+SS)+SS by the processor, wherein m is an integer; and (2) adjusting a space SM of adjacent two of the marks by the processor such that WM+SM=n(WS+SS), wherein n is an integer.
    Type: Application
    Filed: May 15, 2014
    Publication date: October 15, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Yu-Ying Huang, Jen-Hsiu Li, Mei-Chen Chen, Ya-Ling Chen, Yi-Jing Wang, Chi-Ming Huang
  • System and method for testing RFID devices
    Patent number: 7528712
    Abstract: A system for testing RFID devices is introduced. The system includes a carrier plate configured for carrying an RFID device, a cable configured for supporting the carrier plate, a pulley apparatus configured for transporting the carrier plate along the cable, and a controller configured for adjusting test parameters in testing the RFID device.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: May 5, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Min-Kao Hong, Hsin-Teng Lin, Shao-Wei Chung, Yu-Ying Huang, Jen-Chao Lu, Li-Huei Chen
  • System and method for testing RFID devices
    Publication number: 20070279212
    Abstract: A system for testing RFID devices is introduced. The system includes a carrier plate configured for carrying an RFID device, a cable configured for supporting the carrier plate, a pulley apparatus configured for transporting the carrier plate along the cable, and a controller configured for adjusting test parameters in testing the RFID device.
    Type: Application
    Filed: February 5, 2007
    Publication date: December 6, 2007
    Inventors: Min-Kao Hong, Hsin-Teng Lin, Shao-Wei Chung, Yu-Ying Huang, Jen-Chao Lu, Li-Huei Chen