Patents by Inventor Yu-Zhong Chen

Yu-Zhong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220358275
    Abstract: One aspect of this description relates to a method for operating an integrated circuit (IC) manufacturing system. The method includes placing a first nano-sheet structure within a IC layout diagram. The first nano-sheet structure has a first width. The method includes abutting a second nano-sheet structure with the first nano-sheet structure. The second nano-sheet structure has a second width. The second width is less than the first width. The method includes generating and storing the IC layout diagram in a storage device.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-An Lai, Wei-Cheng Lin, Yan-Hao Chen, Jiann-Tyng Tzeng, Lipen Yuan, Hui-Zhong Zhuang, Yu-Xuan Huang
  • Publication number: 20220292244
    Abstract: One aspect of this description relates to a method for operating an integrated circuit (IC) manufacturing system. The method includes placing a first nano-sheet structure within a IC layout diagram. The first nano-sheet structure has a first width. The method includes abutting a second nano-sheet structure with the first nano-sheet structure. The second nano-sheet structure has a second width. The second width is less than the first width. The method includes generating and storing the IC layout diagram in a storage device.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-An Lai, Wei-Cheng Lin, Yan-Hao Chen, Jiann-Tyng Tzeng, Lipen Yuan, Hui-Zhong Zhuang, Yu-Xuan Huang
  • Patent number: 11429774
    Abstract: One aspect of this description relates to a method for operating an integrated circuit (IC) manufacturing system. The method includes placing a first nano-sheet structure within a IC layout diagram. The first nano-sheet structure has a first width. The method includes abutting a second nano-sheet structure with the first nano-sheet structure. The second nano-sheet structure has a second width. The second width is less than the first width. The method includes generating and storing the IC layout diagram in a storage device.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-An Lai, Wei-Cheng Lin, Yan-Hao Chen, Jiann-Tyng Tzeng, Lipen Yuan, Hui-Zhong Zhuang, Yu-Xuan Huang
  • Patent number: 6686898
    Abstract: Driving method and circuit of an organic light emitting diode, applied to an array of a plurality of organic light emitting diode. The array has several rows and columns of organic light emitting diodes. The row and column corresponding to the organic light emitting selected to illuminate are selected. A first voltage is applied to the selected column, and a second voltage is applied to the selected row. The difference between the first and second voltages is larger than the conducting voltage of the organic light emitting diode, so that the light emitting diode can illuminate. A third voltage and a fourth voltages are applied to other rows and columns which are not connected to the selected organic light emitting diode to provide a reverse bias to all the remaining light emitting diodes.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: February 3, 2004
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Yu-Zhong Chen, Chih-Jung Yu, Chen-Ting Tsai, Chieu-Yao Chin
  • Publication number: 20030038761
    Abstract: Driving method and circuit of an organic light emitting diode, applied to an array of a plurality of organic light emitting diode. The array has several rows and columns of organic light emitting diodes. The row and column corresponding to the organic light emitting selected to illuminate are selected. A first voltage is applied to the selected column, and a second voltage is applied to the selected row. The difference between the first and second voltages is larger than the conducting voltage of the organic light emitting diode, so that the light emitting diode can illuminate. A third voltage and a fourth voltages are applied to other rows and columns which are not connected to the selected organic light emitting diode to provide a reverse bias to all the remaining light emitting diodes.
    Type: Application
    Filed: November 27, 2001
    Publication date: February 27, 2003
    Inventors: Yu-Zhong Chen, Chih-Jung Yu, Chen-Ting Tsai, Chieu-Yao Chin